CN0218 Software User Guide10/18/2018
Design & Integration File
- Bill of Materials
- Gerber Files
- PADS Files
- Assembly Drawing
Part Numbers with "Z" indicate RoHS Compliance. Boards checked are needed to evaluate this circuit.
- EVAL-CFTL-6V-PWRZ ($20.01) Wall Power Supply for Eval Board
- EVAL-CN0218-SDPZ ($64.74) 500 V Common-Mode Voltage Current Monitor
- EVAL-SDP-CB1Z ($116.52) Eval Control Board SDP
Features & Benefits
- 0 to 500 V common mode voltage
- Single supply voltage
- Galvanic isolation protects processor
- Creates isolated supply for digital control
- Unidirectional current monitor system
Markets and Technologies
Documentation & Resources
Circuit Function & Benefits
The circuit shown in Figure 1 monitors current in systems with high positive common-mode dc voltages of up to +500 V with less than 0.2% error. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 500 mV at maximum load current.
The AD8212 accurately amplifies a small differential input voltage in the presence of large positive common-mode voltages greater than 500 V when used in conjunction with an external PNP transistor.
Galvanic isolation is provided by the ADuM5402 quad channel isolator. This is not only for protection but to isolate the downstream circuitry from the high common-mode voltage. In addition to isolating the output data, the ADuM5402 digital isolator can also supply isolated +3.3 V for the circuit.
The measurement result from the AD7171 is provided as a digital code utilizing a simple 2-wire, SPI-compatible serial interface.
This combination of parts provides an accurate high voltage positive rail current sense solution with a small component count, low cost, and low power.
The circuit is designed for a full-scale shunt voltage of 500 mV at maximum load current IMAX. Therefore, the value of the shunt resistor is RSHUNT = (500 mV)/(IMAX).
The AD8212 process has a breakdown voltage limitation of 65 V. For this reason, the common-mode voltage must remain below 65 V. By utilizing an external PNP BJT transistor, the common-mode voltage range can be extended to greater than 500 V, depending on the breakdown voltage of the transistor.
There is no dedicated power supply for the AD8212. Instead, it creates a 5 V supply by essentially "floating" itself off the 500 V common-mode voltage by utilizing an internal 5 V series regulator as shown in Figure 2. This regulator ensures that at all times the COM (Pin 2), which is the most negative of all the terminals, is always 5 V less than the supply voltage (V+).
In this mode of operation, the supply current (IBIAS) of the AD8212 circuit is based entirely on the supply range and the chosen value of the RBIAS resistor. For example, for V+ = 500 V, and RBIAS = 500 kΩ,
IBIAS = (500 V −5 V)/RBIAS = 990 μA,
In this high voltage mode, IBIAS should be between 200 μA and 1 mA. This ensures the bias circuit is active, allowing proper operation of the device.
Note that the 500 kΩ bias resistor (5 × R2) is made up of five individual 100 kΩ resistors. This is to provide protection from resistor voltage breakdown. Additional breakdown protection can be added by eliminating the ground plane immediately under the resistor string.
The load current flowing through the external shunt resistor produces a voltage at the input terminals of the AD8212. Internal amplifier A1 responds by causing transistor Q1 to conduct the necessary current through resistor R1 to equalize the potential at both the inverting and noninverting inputs of the amplifier A1.
The current through the emitter of transistor Q1 (IOUT) is proportional to the input voltage (VSENSE) and, therefore, the load current (ILOAD) through the shunt resistor (RSHUNT). The output current (IOUT) is converted to a voltage by using an external resistor, the value of which is dependent on the inputto- output gain desired in the application.
The transfer function for the AD8212 is:
IOUT = gm × VSENSE
VSENSE = ILOAD × RSHUNT
VOUT = IOUT × ROUT
VOUT = (VSENSE × ROUT)/1000
gm = 1000 μA/V
The input sense voltage has a fixed range of 0 V to 500 mV. The output voltage range can be scaled according to the value of ROUT. A 1 mV change in VSENSE produces a 1 mA change in IOUT, which, when passed through a 5 kΩ resistor, causes a 1 mV change in VOUT.
In the circuit of Figure 1, the load resistor is 24.9 kΩ, thereby providing a gain of 5. A full-scale input voltage of 500 mV produces a 2.5 V output, which corresponds to the full-scale input range of the AD7171 ADC.
The AD8212 output is intended to drive high impedance nodes. Therefore, if interfacing with a converter, it is recommended the output voltage across ROUT be buffered so that the gain of the AD8212 is not affected.
Notice that the power supply voltage for the ADR381 and the AD7171 are supplied by the isolated power output (+3.3 VISO) of the ADuM5402 quad isolator.
The reference voltage for the AD7171 is supplied by the ADR381 precision band gap reference. The ADR381 has an initial accuracy of ±0.24% and a typical temperature coefficient of 5 ppm/°C.
Although it is possible to operate both the AD7171 VDD and REFIN(+) from the 3.3 V power supply, using a separate reference provides better accuracy. A 2.5 V reference is chosen to provide sufficient headroom.
The input voltage to the AD7171 ADC is converted into an offset binary code at the output of the ADC. The ADuM5402 provides the isolation for the DOUT data output, the SCLK input, and the PDRST input. Although the isolator is optional, it is recommended to protect the downstream digital circuitry from the high common-mode voltage in the case of a fault condition.
The code is processed in the PC by using the SDP hardware board and LabVIEW Evaluation software in Figure 3.
The graph in Figure 4 shows how the circuit tested achieves an error of less than 0.2% over the entire input voltage range (0 mV to 500 mV). A comparison is made between the code seen at the output of the ADC recorded by LabVIEW and an ideal code calculated based on a perfect system.
PCB Layout Considerations
In any circuit where accuracy is crucial, it is important to consider the power supply and ground return layout on the board. The PCB should isolate the digital and analog sections as much as possible. This PCB was constructed in a 4-layer stack up with large area ground plane layers and power plane polygons. See the MT-101 Tutorial for information on decoupling techniques.
The power supply to the AD7171 and ADuM5402 should be decoupled with 10 μF and 0.1 μF capacitors to properly suppress noise and reduce ripple. The capacitors should be placed as close to the device as possible with the 0.1 μF capacitor having a low ESR value. Ceramic capacitors are advised for all high frequency decoupling.
Care should be taken in considering the isolation gap between the primary and secondary sides of the ADuM5402. The EVAL-CN0218-SDPZ board maximizes this distance by pulling back any polygons or components on the top layer and aligning them with the pins on the ADuM5402.
Power supply lines should have as large a trace width as possible to provide low impedance paths and reduce glitch effects on the supply line. Clocks and other fast switching digital signals should be shielded from other parts of the board by digital ground.
A complete design support package for this circuit note, including board layouts, can be found at http://www.analog.com/CN0218-DesignSupport.
There are a number of solutions available for high-side sensing of positive sources. IC solutions using current sense amplifiers, difference amplifiers, or a combination of these are available. “High-Side Current Sensing: Difference Amplifier vs, Current Sense Amplifier,” Analog Dialogue, January 2008, describes the use of current sense and difference amplifiers. The article is available at www.analog.com/HighSide_CurrentSensing.
The following URLs link to Analog Devices products useful in solving the current sense problem:
Figure 4 shows an alternate circuit, which can be used when a bidirectional current sense is required for positive common-mode voltages greater than +65 V. By implementing a second AD8212 in the configuration, one can measure the charge and the load currents, respectively. Note that VOUT1 increases as ILOAD flows through the shunt resistor. VOUT2 increases as ICHARGE flows through the shunt resistor.
Circuit Evaluation & Test
WARNING! HIGH VOLTAGE. THIS CIRCUIT MAY CONTAIN LETHAL VOLTAGES. DO NOT OPERATE, EVALUATE, OR TEST THIS CIRCUIT, OR BOARD ASSEMBLY, UNLESS YOU ARE A TRAINED PROFESSIONAL, WHO IS QUALIFIED TO HANDLE HIGH VOLTAGE CIRCUITRY. BEFORE APPLYING POWER, YOU MUST BE FAMILIAR WITH THE CIRCUITRY AND ALL REQUIRED PRECAUTIONS FOR WORKING WITH HIGH VOLTAGE CIRCUITS.
This circuit uses the EVAL-CN0218-SDPZ circuit board and the EVAL-SDP-CB1Z System Demonstration Platform (SDP) evaluation board. The two boards have 120-pin mating connectors, allowing for the quick setup and evaluation of the circuit’s performance. The EVAL-CN0218-SDPZ board contains the circuit to be evaluated, as described in this note, and the SDP evaluation board is used with the CN0218 evaluation software to capture the data from the EVAL-CN0218-SDPZ circuit board, displayed below.
- PC with a USB port and Windows® XP or Windows Vista® (32-bit), or Windows® 7 (32-bit)
- EVAL-CN0218-SDPZ circuit evaluation board
- EVAL-SDP-CB1Z SDP evaluation board
- CN0218 evaluation software
- Power supply: +6 V, or +6 V “wall wart”
- Shunt resistor with maximum voltage of 500 mV at the maximum load current.
- Electronic load
Load the evaluation software by placing the CN0218 evaluation software disc in the CD drive of the PC. Using "My Computer," locate the drive that contains the evaluation software disc and open the Readme file. Follow the instructions contained in the Readme file for installing and using the evaluation software.
Functional Block Diagram
See Figure 1 of this circuit note for the circuit block diagram and the EVAL-CN0218-SDPZ-SCH pdf file for the circuit schematics. This file is contained in the CN0218 Design Support Package.
Connect the 120-pin connector on the EVAL-CN0218-SDPZ circuit board to the connector marked “CON A” on the EVAL-SDP-CB1Z evaluation (SDP) board. Nylon hardware should be used to firmly secure the two boards, using the holes provided at the ends of the 120-pin connectors.
Connect a shunt resistor across the input terminals (RSHUNT) with a load to ground as indicated in Figure 1. With power to the supply off, connect a +6 V power supply to the pins marked "+6 V" and "GND" on the board. If available, a +6 V "wall wart" can be connected to the barrel connector on the board and used in place of the +6 V power supply. Connect the USB cable supplied with the SDP board to the USB port on the PC. Note: Do not connect the USB cable to the mini USB connector on the SDP board at this time.
It is important to connect the system ground and the PCB isolated ground to guarantee correct voltage levels and operation. Test point 31 and test point 32 give access to the GND_ISO required to properly make this connection.
Apply power to the +6 V supply (or "wall wart") connected to the EVAL-CN0218-SDPZ circuit board. Launch the evaluation software and connect the USB cable from the PC to the USB mini-connector on the SDP board.
Once USB communications are established, the SDP board can be used to send, receive, and capture serial data from the EVAL-CN0218-SDPZ board. Data can be recorded for various values of load current as the electronic load is stepped.
Information and details regarding how to use the evaluation software for data capture can be found in the CN0218 evaluation software Readme file.
Information regarding the SDP board can be found in the SDP User Guide.
Pricing displayed is based on 1-piece.
Up to two boards can be purchased through Analog.com. To order more than two, please purchase through one of our listed distributors.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.