ADCMP553:  Single - Supply, High Speed PECL Comparator in an 8-lead MSOP Package

The ADCMP551/ADCMP552/ADCMP553 are single supply, high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 750 ps propagation delay with less than 150 ps ...More

For additional technical information and samples, pls contact the High Speed Comparators Group. Supply your name, company, mailing address, telephone/fax numbers, email address and a brief description of your application.

ADCMP553:  Single - Supply, High Speed PECL Comparator in an 8-lead MSOP Package

Product Description

The ADCMP551/ADCMP552/ADCMP553 are single supply, high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 750 ps propagation delay with less than 150 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP552.

A differential input stage permits consistent propagation delay with a common-mode range from –0.2 V to VCCI – 2.0 V. Outputs are complementary digital signals are fully compatible with PECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 . to VCCO - 2 V. A latch input is included and permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pullups that set the latch in tracking mode when left open.

The ADCMP551/ADCMP552/ADCMP553 are specified over the –40°C to +85°C industrial temperature range. The ADCMP551 is available in a 16-lead QSOP package; the ADCMP552 is available in a 20-lead QSOP package; and the ADCMP553 is available in an 8-lead MSOP package.

Features

  • Single Power Supply
  • 750 ps Propagation Delay Input to Output
  • 100 ps Propagation Delay Dispersion
  • Differential PECL Compatible Outputs
  • Differential Latch Control
  • Power Supply Rejection Greater than 70 dB
  • Internal Latch Pull-up Resistors
  • 750 ps Minimum Pulse Width
  • Equivalent Input Rise Time
    Bandwidth > 750 MHz
  • Typical Output Rise/Fall of 500 ps
  • Programmable Hysteresis

Diagrams

ADCMP553 Diagram
Functional Block Diagram for ADCMP553

技术指标

Logic Output PECL
# Per Pkg 1
Prop Delay (ns)typ 0.75ns
Voltage Supply (V) 3.3 to 5
Supply Current (max) 8mA
Min Pulse Width 700ps
Package 8-Lead MSOP
Output Rise/Fall Time 500 ps
Latch Enable Pin X

浏览其他的产品

Part# Prop Delay (ns)typ # Per Pkg Total Power (mW) Voltage Supply (V) No of Supplies Input Range (V) Logic Output Adjustable Hysteresis Min Pulse Width
AD790 45 1 250 +/-15 3 -Vs to Vs -2V TTL/CMOS Fixed -
AD8561 7 1 65 +/- 5 2 -5.0V to +3.0V Diff/TTL - -
AD8564 8 4 150 +/- 5 2 -5.0V to +3.0V TTL/CMOS - -
AD8611 5.5 1 50 3 to 5 1 0 to 3V Diff/TTL - -
AD8612 5.5 2 100 3 to 5 1 0 to 3V Diff/TTL - -
AD96685 6 1 120 5, -5.2 2 -2.5V to +5.0V Diff/ECL - -
AD96687 6 2 240 5, -5.2 2 -2.5V to +5.0V Diff/ECL - -
ADCMP551 0.75 2 60 3.3 to 5 1 -0.2 to Vcc-2V PECL - 700ps
ADCMP552 0.75 2 60 3.3 to 5 1 -0.2 to Vcc-2V PECL X 700ps
ADCMP553 0.75 1 30 3.3 to 5 1 -0.2 to Vcc-2V PECL - 700ps
ADCMP561 0.75 2 160 5, -5.2 2 -2 to 3V PECL - 700ps
ADCMP562 0.75 2 160 5, -5.2 2 -2 to 3V PECL X 700ps
ADCMP563 0.75 2 120 5, -5.2 2 -2 to 3V ECL - 700ps
ADCMP564 0.75 2 120 5, -5.2 2 -2 to 3V ECL X 700ps
ADCMP572 0.15 1 145 3.3 to 5 1 -0.2 to Vcci-2.1V CML X 80ps
ADCMP573 0.15 1 145 3.3 to 5 1 -0.2 to Vcci-2.1V PECL X 80ps
ADCMP580 0.15 1 240 5, -5.2 2 -2 to 3V CML X 80ps
ADCMP581 0.15 1 240 5, -5.2 2 -2 to 3V ECL X 80ps
ADCMP582 0.15