Design Handbooks (19)
- Printed Circuit Board Design (PCB) Issues
- ADCs for Signal Conditioning (pdf, 223 kB)
- Fundamentals of Analog to Digital Conversion
- High Speed Sampling ADCs
- ADCs for DSP Applications
- Overview of DAC and ADC Architectures
- Undersampling Applications
- Sampled Data Systems
- High Speed Sampling and High Speed ADCs (pdf, 335 kB)
- PC Board Layout and Design Tools
- High Speed Data Conversion Overview
- Optimizing Data Converter Interfaces (pdf, 1677 kB)
Op Amp Applications
- Table of Contents (pdf, 114 kB)
- Chapter H: Op Amp History (pdf)
- Chapter 1: Op Amp Basics (pdf, 1657 kB)
- Chapter 2: Specialty Amplifiers (pdf, 670 kB)
- Chapter 3: Using Op Amps with Data Converters (pdf, 570 kB)
- Chapter 4: Sensor Signal Conditioning (pdf, 755 kB)
- Chapter 5: Analog Filters, part A (pdf, 3003 kB)
- Chapter 5: Analog Filters, part B (pdf, 1530 kB)
- Chapter 6: Signal Amplifiers (pdf, 3862 kB)
- Chapter 7: Hardware and Housekeeping Techniques (pdf, 2765 kB)
- Index (pdf, 293 kB)
Mixed Signal and DSP Design Techniques
- Outline (pdf, 87 kB)
- Section 1: Introduction (pdf, 132 kB)
- Section 2: Sampled Data Systems (pdf, 419 kB)
- Section 3: ADCs For DSP Applications (pdf, 274 kB)
- Section 4: DACs For DSP Applications (pdf, 193 kB)
- Section 5: Fast Fourier Transforms (pdf, 310 kB)
- Section 6: Digital Filters (pdf, 338 kB)
- Section 7: DSP Hardware (pdf, 998 kB)
- Section 8: Interfacing To DSPs (pdf, 236 kB)
- Section 9: DSP Applications (pdf, 421 kB)
- Section 10: Hardware Design (pdf, 488 kB)
- Index (pdf, 145 kB)
- The Data Conversion Handbook
High Speed System Applications
- Table of Contents (pdf, 2296 kB)
- Section 1: High Speed Data Conversion Overview (pdf)
- Section 2: Optimizing Data Converter Interfaces (pdf, 1677 kB)
- Section 3: DAC, DDS, PLL's, and Clock Distribution (pdf, 7676 kB)
- Section 4: PC Board Layout and Design Tools (pdf, 3570 kB)
Practical Design Techniques for Sensor Signal Conditioning
- Outline (PDF, 76 kB)
- Section 1: Introduction (PDF, 112 kB)
- Section 2: Bridge Circuits (PDF, 162 kB)
- Section 3: Amplifiers for Signal Conditioning (PDF, 397 kB)
- Section 4: Strain, Force, Pressure, and Flow Measurements (PDF, 179 kB)
- Section 5: High Impedance Sensors (PDF, 235 kB)
- Section 6: Position and Motion Sensors (PDF, 162 kB)
- Section 7: Temperature Sensors (PDF, 229 kB)
- Section 8: ADC's for Signal Conditioning (PDF, 220 kB)
- Section 9: Smart Sensors (PDF, 191 kB)
- Section 10: Hardware Design Techniques (PDF, 336 kB)
- Index (PDF, 58 kB)
Practical Analog Design Techniques
- Section 1: Single-Supply Amplifiers (pdf, 300 kB)
- Section 2: High Speed Op Amps (pdf, 568 kB)
- Section 3: High Resolution Signal Conditioning ADCs (pdf, 702 kB)
- Section 4: High Speed Sampling ADCs (pdf, 850 kB)
- Section 5: Undersampling Applications (pdf, 502 kB)
- Section 6: Multichannel Applications (pdf, 593 kB)
- Section 7: Overvoltage Effects on Analog Integrated Circuits (pdf, 561 kB)
- Section 8: Distortion Measurements (pdf, 375 kB)
- Section 9: Hardware Design Techniques (pdf, 1335 kB)
High Speed Design Techniques
- Preface: High Speed Design Techniques (pdf, 94 kB)
- Section 1: High Speed Operational Amplifiers (pdf, 283 kB)
- Section 2: High Speed Op Amp Applications (pdf, 557 kB)
- Section 3: RF/IF Subsystems (pdf, 434 kB)
- Section 4: High Speed Sampling and High Speed ADCs (pdf, 335 kB)
- Section 5: High Speed ADC Applications (pdf, 398 kB)
- Section 6: High Speed DACs and DDS Systems (pdf, 253 kB)
- Section 7a: High Speed Hardware Design Techniques (pdf, 597 kB)
- Section 7b: Grounding in High Speed Systems (pdf, 655 kB)
ADI Wireless Seminar 2006
- Index (pdf, 34 kB)
- Chapter I: Wireless Systems Overview (pdf, 212 kB)
- Chapter II: RF/IF Components and Specifications for Receivers (pdf, 642 kB)
- Chapter III: RF/IF Components and Specifications for Transmitters (pdf, 1379 kB)
- Chapter IV: RF Components Active and Passive Mixers (pdf, 480 kB)
- Chapter V: Phase Locked Loops for High Frequency Transmitters and Receivers (pdf, 469 kB)
- Chapter VI: A Detailed Look at Wireless Signal Chain Architectures (pdf, 380 kB)
- Chapter VII: Receiver Optimization Using Error Vector Magnitude Analysis (pdf, 189 kB)
- Chapter VIII: Design and Operation of Automatic Gain Control Loops for Receivers in Modern Communications Systems (pdf, 442 kB)
- Chapter IX: Using Calibration and Temperature Compensation to Improve RF Power Detector Accuracy (pdf, 285 kB)
- Chapter X: Measuring VSWR and Gain in Wireless Systems (pdf, 472 kB)
- Chapter XI: A 2.4-GHz Direct Conversion Transmitter for WiMAX and WiBro Applications (pdf, 275 kB)
- Chapter XII: Use a Wideband, Integer-N, PLL Synthesizer as a Direct 6-GHz Local Oscillator (pdf, 233 kB)
- Chapter XIII: Short Range Wireless Devices - Building a Global License-Free System at Frequencies Below 1GHz (pdf, 274 kB)
- Download All Chapters (zip, 5102 kB)
- MT-229: Quantization Noise: An Expanded Derivation of the Equation, SNR = 6.02 N + 1.76 dB (pdf, 214 kB)
- MT-228: High Speed ADC Analog Input Interface Considerations (pdf, 712 kB)
- MT-227: Operating a Typical High Speed ADC Evaluation Board Setup (pdf, 650 kB)
- MT-201: Interfacing FPGAs to an ADC Converter's Digital Data Output (pdf, 564 kB)
- MT-200: Minimizing Jitter in ADC Clock Interfaces (pdf, 447 kB)
- Integrated SAR ADC Family in 4mm x 4mm Package (pdf, 1670 kB)
- Tutorial on Technical and Performance Benefits of AD719x Family (pdf, 4889 kB)
- MT-101: Decoupling Techniques (pdf, 954 kB)
- MT-031: Grounding Data Converters and Solving the Mystery of (pdf, 144 kB)
- MT-030: Resolver-to-Digital Converters (pdf, 57 kB)
- MT-029: Optical Encoders (pdf, 34 kB)
- MT-027: ADC Architectures VIII: Integrating ADCs (pdf, 235 kB)
- MT-026: ADC Architectures VII: Counting ADCs (pdf, 50 kB)
- MT-025: ADC Architectures VI: Folding ADCs (pdf, 823 kB)
- MT-024: ADC Architectures V: Pipelined Subranging ADCs (pdf, 1039 kB)
- MT-023: ADC Architectures IV: Sigma-Delta ADC Advanced Concepts and Applications (pdf, 936 kB)
- MT-022: ADC Architectures III: Sigma-Delta ADC Basics (pdf, 289 kB)
- MT-021: ADC Architectures II: Successive Approximation ADCs (pdf, 3799 kB)
- MT-020: ADC Architectures I: The Flash Converter (pdf, 1544 kB)
- MT-012: Intermodulation Distortion Considerations for ADCs (pdf, 176 kB)
- MT-011: Find Those Elusive ADC Sparkle Codes and Metastable States (pdf, 1133 kB)
- MT-010: The Importance of Data Converter Static Specifications – Don't Lose Sight of the Basics! (pdf, 100 kB)
- MT-009: Data Converter Codes—Can You Decode Them? (pdf, 76 kB)
- MT-008: Converting Oscillator Phase Noise to Time Jitter (pdf, 123 kB)
- MT-007: Aperture Time, Aperture Jitter, Aperture Delay Time Removing the Confusion (pdf, 76 kB)
- MT-006: ADC Noise Figure An Often Misunderstood and Misinterpreted Specification (pdf, 86 kB)
- MT-005: Noise Power Ratio (NPR) A 65-Year Old Telephone System Specification Finds New Life in Modern Wireless Applications (pdf, 213 kB)
- MT-004: The Good, the Bad, and the Ugly Aspects of ADC Input Noise Is No Noise Good Noise? (pdf, 342 kB)
- MT-003: Understand SINAD, ENOB, SNR, THD, THD + N, and SFDR so You Don't Get Lost in the Noise Floor (pdf, 92 kB)
- MT-002: What the Nyquist Criterion Means to Your Sampled Data System Design (pdf, 152 kB)
- MT-001: Taking the Mystery out of the Infamous Formula, "SNR=6.02N + 1.76dB," and Why You Should Care (pdf, 94 kB)
- MT-075: Differential Drivers for High Speed ADCs Overview (pdf, 183 kB)
- MT-074: Differential Drivers for Precision ADCs (pdf, 249 kB)
JESD204B Converter-to-FPGA Connectivity
Watch the AD9250 a dual, 14-bit, 250 MSPS, ADC with a JESD204B high speed serial interface connected to a Xilinx KC705 development system run the Analog Devices reference design, which includes the Xilinx LogiCORE™ IP JESD204 core.
ADAS1000 ECG Analog Front-End with Diagnostic Performance
The ADAS1000 is an integrated 5 channel AFE to support ECG measurement up to 8-leads with diagnostic performance. The chip supports additional features like Respiration-measurement, Pace-detect and AC/DC lead of detection.
- AD7091R Enables Power Budget Optimization
AD7190 Active Functional ADC Model
This video demonstrates how the ADC Active Functional Model is used to evaluate and debug the AD7190. The AD7190 is a low noise, complete AFE for high precision measurement applications; it contains a 24-bit sigma-delta ADC & a low noise gain stage.
Interfacing the AD9739A FMC board to Xilinx FPGA platforms
AD9739A FMC board, is a 14-bit D/A converter that enables cable TV and broadband operators to synthesize the entire cable spectrum up to 1 GHz into a single RF (radio frequency) port on the Xilinx Virtex-6 ML605, Kintex-7 KC705, and Virtex-7 VC707.
JESD204A Converters Reduce Power & Space in Comms Applications
The AD9644 is a low-power, high-speed 14-bit ADCs with JESD204A data converter serial interface allow designers to extend transmission lengths while improving signal integrity and simplifying printed-circuit board layout.
- Video: Integrated SAR ADC Family in 4 mm x 4 mm 20-lead LFCSP
- ADAS1000: AFE for Diagnostic-Quality ECG Applications
AD9284 and AD9286: Dual 8-bit and Lowest Power 8-bit A to D Converters
Two analog to digital converters from Analog Devices. The AD9284 is the industry's first dual 8-bit 250MSPS A to D converter, and the AD9286 is the lowest power 8-bit 500MSPS A to D converter available today, consuming just 310mW.
- AD9467 Evaluation Board Set Up
AD7626: 16-BIT, 10-MSPS SAR Converter
ADI's AD7626 PulSAR® ADC achieves a new level of 16-bit data capture performance, with best-in-class 15-bit ENOB (effective number of bits) and 10-MSPS (million samples per second) throughput, which is 2.5 times faster than other SAR ADCs.
AD9272/AD9273 Octal Receivers for Medical Ultrasound
The AD9272 and AD9273 are ADI's next-generation, octal receivers for medical ultrasound. Each device integrates 8 channels of LNA, VGA, AAF, and 12-bit ADC on a single chip.
ADAS1128: 28-channel, 24-bit, 20 kSPS Current-to-Digital Converter
The ADAS1128 is a 128-channel, analog-current-to-digital converter. It contains 128 low-power, low-noise, low-input current integrators, simultaneous sample-holds and two high-speed, high-resolution ADCs with configurable sampling rate and resolution up to 24 bits. The primary application is CT Scanners.
AD9262: Dual Continuous Time Sigma-Delta ADC
This video features the thought leaders (engineers and marketeers) involved with the creation of the AD9262. The AD9262 is a dual, 16-bit analog-to-digital converter (ADC) based on a continuous time sigma-delta architecture that achieves 86 dB of dynamic range over a 10 MHz input bandwidth.
Precision basics: How not to be surprised by unexpected error sources
This webcast, co-sponsored by Avnet EM, presents error sources of a few fundamental front end signal conditioning blocks and provides hints for better practices that will save money and speed development time.
Fundamentals of Designing with Analog to Digital Converters
BACK BY POPULAR DEMAND: an update to The Fundamentals of the Analog to Digital Converter (ADC) webcast, including basic ADC architectures, understanding ADC errors, how to read an ADC data sheet, and how to choose the right ADC. Includes the latest on ADC products and technology.
How to Lower Power Consumption in Data Acquisition Systems
This webcast will present solutions to lower the power consumption in data acquisition systems. Among the topics to be discussed are the limitations and tradeoffs of using lower power components (such as ADC drivers, regulators, etc). If you are currently in the design phase of a lower power Data Acquisition system, this is a webcast you should attend.
Solving Isolation Challenges in Power Conversion Applications
This webcast will present solutions to isolation challenges in power conversion applications. Among the topics to be discussed are the limitations of traditional methods of isolation (such as utilization of optocouplers and pulse transformers) vs. more efficient and cost effective solutions that utilize digital isolators. If you are currently using optocouplers and pulse transformers, this is a webcast you should attend.
Demystifying the JESD204B High-speed Data Converter-to-FPGA interface
This webcast will provide an overview of the JESD204 standard from its original version up to the current "B" revision. In addition, common "high-performance metrics" that are associated with high speed serial interfaces such as JESD204 will be described. Topics covered in this webcast will also be useful for applications that use similar high speed serial interfaces.
The Latest on Driving ADCs Differentially: Part 1
This is the first of a two-part series addressing how to select the right differential ADC driver for your design. In part one we look at the basics of driving ADCs: topics include errors in sampled data systems such as distortion and noise, ENOB, differential signaling definitions and advantages, and ADC driver architectures. Next month part 2 will take these basic concepts and use them to make the driver selection.
Webcast: The Latest on Driving ADCs Differentially: Part 2
This is the second of a two-part series addressing how to select the right differential ADC driver for your design. In part one we looked at the basics of driving ADCs, including errors in sampled data systems (such as distortion and noise) ENOB, differential signaling definitions, and advantages of ADC driver architectures. This month we will take these basic concepts and use them to make the driver selection and design driving circuits.
Healthcare Webcast: Optimizing Ultrasound Systems using Integrated Receivers
In this webcast TGC noise analysis techniques will be presented to aid designers in determining receiver noise contributions in near and far field B mode imagining. The key IC performance specifications that determine PW Doppler mode sensitivity will also be discussed, as will analysis of the CW Doppler signal path critical noise sources and suggested filtering techniques will be presented.
Healthcare Webcast: Fundamentals of ADC Technologies for Healthcare Design
This session will explain the main ADC architectures in use today, and their advantages and disadvantages for different medical and healthcare applications such as ECG, diagnostics and ultrasound. It will present the latest developments in: Successive approximation, Sigma delta, Pipelined architectures, Design guidance on clocking, grounding, shielding and other techniques to get the best performance from the device will be presented.
Fundamentals of Designing with Semiconductors: Analog to Digital Converters
This webcast concludes our three-part series focusing on the conversion of analog, electrical signals into and from digital signals. In this webcast we will present the fundamentals of the analog to digital converter (ADC), including basic ADC architectures, understanding ADC errors, how to read an ADC data sheet, and how to choose the right ADC. Register for June 8th premiere.
Healthcare Webcast: Solving Medical Equipment Signal Path Design Challenges
Medical devices and instruments are trending toward lower power and smaller form factors, yet they must deliver high performance and accuracy, sometimes in very harsh environments. In this webcast we're going to learn how analog and mixed signal components can help enable system designers to meet those stringent objectives.
Converters in Motion: A/D Converter Considerations for Motor Control
In this webcast we'll look at the analog to digital converter requirements and typical motor control circuit configurations for AC servos and variable frequency drives, and gain some knowledge on how to select the most appropriate converter for this type of specific control application.
Webcast: Design And Develop Innovative And Robust Touch Sensor Interfaces Using Capacitive-To-Digital Converters
This Webcast will focus on the design and development of CDC-based touch sensors and their application, cite CDC product examples such as the AD7142, and explore development tools provided by ADI.
Webcast: Differential Circuit Design Techniques for Communication Applications
In this Webinar, we will explore the advantages of differential design techniques and how their performance benefits affect the stringent system requirements of today's high performance communication systems.
Webcast: Understanding Data Converter Errors and Specifications
In this Webcast, ADI systems applications expert Chris Hyde will conduct a rapid review of the most common sources of errors in a data converter and how to interpret specs on the data sheet.
Webcast: Simplify and Reduce Active Filter Design Time
In this fast-paced Webcast, our analog experts will take you through the process of designing a low pass and high pass active filter. Filter theory and architecture will be discussed as well as the utilization of design tools and new active filter evaluation boards used to simplify and expedite the design process.
Designing Transformer Coupled Front-Ends for High Performance A/D Converters
This Webcast will provide a practical "formula" approach for designing transformer-coupled front-ends for high performance ADC in baseband and super-Nyquist applications.
Driving High Performance ADCs in Communication Applications
In this Webcast, our amplifier expert will review RF versus ADC terminology, provide a basic overview of system budgeting, contrast different ADC driver implementations, and touch on filter design techniques required to meet today's stringent system requirements.