4.5 GHz Ultrahigh Dynamic Range, Dual Differential Amplifier
The ADL5566 provides a gain of 16 dB. For the single-ended input configuration, the gain is reduced to 14 dB. Using two external series resistors for each amplifier expands the gain flexibility of the amplifier and allows for any gain selection from 0 dB to 16 dB for a differential input and 0 dB to 14 dB for a single-ended input. In addition, this device maintains low distortion down to output (VOCM) levels of 1.2 V providing an added capability for driving CMOS ADCs at ac levels up to 2 V p-p.
The quiescent current of the ADL5566, using a 3.3 V supply, is typically 70 mA per amplifier. When disabled, it consumes less than 3.5 mA per amplifier and has −25 dB of input-to-output isolation at 100 MHz.
The device is optimized for wideband, low distortion, and noise performance, giving it unprecedented performance for overall spurious-free dynamic range (SFDR). These attributes, together with its adjustable gain capability, make this device the amplifier of choice for driving a wide variety of ADCs, mixers, pin diode attenuators, SAW filters, and multi-element discrete devices.
Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADL5566 is supplied in a compact 4 mm × 4 mm, 24-lead LFCSP package and operates over the −40°C to +85°C temperature range.
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
ADL5566-EVALZ is a fully populated, 4-layer, FR4-based evaluation board. For normal operation it requires a single 3 V - 5 V/100 mA power supply. The power supply should be connected to the test loops labeled VCC and GND. The RF input signals are applied to the SMA connectors labeled VIN1 and VIP2. The RF outputs are available at the SMA connectors labeled VOP1 and VON2. The evaluation board may be converted to a fully differential input and output by installing SMA connectors VIP1, VIN2, VON1, VOP2, and removing R3, R4, R25, R26, installing 0 Ω jumpers R1, R2, R27, R26, removing transformers, T1, T2, T3, T4, and placing jumpers across the transformer pads. The 3 pin headers, ENBL_1 and ENBL_2 control the enable function. Test loops, VCOM-1 and VCOM-2 provide an interface for adjusting the common mode voltage.
The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.
This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:
- Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
- Avoids image rejection issues and unwanted mixing
This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.
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