14-Bit, 2.5 GSPS, RF D/A Converter
By elimination of the synchronization circuitry, some nonideal artifacts such as images and discrete clock spurs remain stationary on the AD9737A/AD9739A between power-up cycles, thus allowing for possible system calibration. AC linearity and noise performance remain the same between the AD9739 and the AD9737A/AD9739A.
The inclusion of on-chip controllers simplifies system integration. A dual-port, source synchronous, LVDS interface simplifies the digital interface with existing FGPA/ASIC technology. On-chip controllers are used to manage external and internal clock domain variations over temperature to ensure reliable data transfer from the host to the DAC core. A serial peripheral interface (SPI) is used for device configuration as well as readback of status registers.
The AD9737A/AD9739A are manufactured on a 0.18 μm CMOS process and operate from 1.8 V and 3.3 V supplies. They are supplied in a 160-ball chip scale ball grid array for reduced package parasitics.
- Ability to synthesize high quality wideband signals with bandwidths of up to 1.25 GHz in the first or second Nyquist zone.
- A proprietary quad-switch DAC architecture provides exceptional ac linearity performance while enabling mix-mode operation.
- A dual-port, double data rate, LVDS interface supports the maximum conversion rate of 2500 MSPS.
- On-chip controllers manage external and internal clock domain skews.
- Programmable differential current output with an 8.66 mA to 31.66 mA range.
- Broadband communications systems
DOCSIS CMTS systems
- Military jammers
- Instrumentation, automatic test equipment
- Radar, avionics
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
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