Features and Benefits
- JESD204B (Subclass 1) coded serial digital outputs
- In band SFDR = 83 dBFS at 340 MHz (750 MSPS)
- In band SNR = 66.7 dBFS at 340 MHz (750 MSPS)
- 1.4 W total power per channel at 750 MSPS (default settings)
- Noise density = −153 dBFS/Hz at 750 MSPS
- 1.25 V, 2.5 V, and 3.3 V dc supply operation
- Flexible input range
- AD6674-750 and AD6674-1000
1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal)
1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal)
- AD6674-750 and AD6674-1000
- 95 dB channel isolation/crosstalk
- Amplitude detect bits for efficient automatic gain control (AGC) implementation
- Noise shaping requantizer (NSR) option for main receiver function
- Variable dynamic range (VDR) option for digital predistortion (DPD) function
- 2 integrated wideband digital processors per channel
- 12-bit numerically controlled oscillator (NCO), up to 4 cascaded half-band filters
- Differential clock inputs
- Integer clock divide by 1, 2, 4, or 8
- Energy saving power-down modes
- Flexible JESD204B lane configurations
- Small signal dither
The AD6674 is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver. It consists of two, 14-bit 1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.
The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.
- Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A
- DOCSIS 3.0 CMTS upstream receive paths
- HFC digital reverse path receivers
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The AD6674-1000EBZ is evaluation board for AD6674 385 MHz BW IF Diversity Receiver. The reference designs provide all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS7-V2EBZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI Controller software package is also compatible with this hardware, and allows the user to access the SPI programmable features of the AD6674. The user guide wiki provides documentation and instructions to configure the device for performance evaluation in the lab.
The AD6674 data sheet provides additional information related to device configuration and performance, and should be consulted when using the evaluation board. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email firstname.lastname@example.org
- Analog signal source and antialiasing filter
- Sample Clock Source
- REFCLOCK source for FPGA receiver
- PC running Windows 7, XP or Vista
- USB 2.0 port recommended (USB 1.1 compatible)
- AD6674-1000EBZ Evaluation Board
- ADS7-V2EBZ FPGA Based Data Capture Kit
- VisualAnalog (ftp://ftp.analog.com/pub/HSSP_SW/VisualAnalog/)
- SPIController (ftp://ftp.analog.com/pub/adispi/A2DComponents/Install/ )
Features & Benefits
- Full featured evaluation board for the AD9680 and AD9234
- SPI interface for setup and control
- Wide band Balun driven input
- No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC
- VisualAnalog® and SPI controller software interfaces
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
AD6674 Companion Parts
Recommended Differential Driver Amplifiers
- For a low output noise, RF differential amplifier for driving heavy loads: ADA4961.
- For ultrahigh dynamic range, low distortion and low noise: ADL5565.
Recommended Power Products
FPGA Interoperability Reports (2)
Technical Articles (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.