| Features |
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- 180 MHz Clock Rate with Selectable 6ðs Reference Clock Multiplier
- On-Chip High Performance 10-Bit DAC and High Speed Comparator with Hysteresis
- SFDR >43 dB @ 70 MHz AOUT
- 32-Bit Frequency Tuning Word
- Simplified Control Interface: Parallel or Serial Asynchronous Loading Format
- 5-Bit Phase Modulation and Offset Capability
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- Comparator Jitter &360;80 ps p-p
@ 20 MHz
- 2.7 V to 5.25 V Single-Supply
Operation
- Low Power: 555 mW @ 180 MHz
- Power-Down Function, 4 mW @ 2.7V
- Ultrasmall 28-Lead SSOP Packaging
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| Design Tools |
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Impedance Matching Tutorial
This tutorial examines the Smith Chart and its application to transmission line impedance matching.
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DDS Evaluation Tool
The purpose of this tool is to assist a user in selecting and evaluating Analog Devices, Direct Digital Synthesis (DDS) IC's. It allows a user to select a device, enter the desired operating conditions and evaluate it's general performance.
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