The AD9461 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The product operates up to 130 MSPS, providing superior SNR for instrumentation, medical imaging, and radar receivers employing baseband (<100 MHz) and IF frequencies.
The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are CMOS or LVDS compatible (ANSI-644 compatible) and include the means to reduce the overall current needed for short trace distances.
Optional features allow users to implement various selectable operating conditions, including input range, data format select, and output data mode.
The AD9461 is available in a Pb-free, 100-lead, surface-mount, plastic package (100-lead TQFP/EP) specified over the industrial temperature range −40°C to +85°C.
|Title||Content Type||File Type|
|AD9461: 16-Bit, 130 MSPS IF Sampling ADC Data Sheet (Rev 0, 05/2006) (pdf, 813 kB)||Data Sheets|
|AN-1142: Techniques for High Speed ADC PCB Layout (pdf, 392 kB)||Application Notes|
|AN-282: Fundamentals of Sampled Data Systems (pdf, 2131 kB)||Application Notes|
|AN-737: How ADIsimADC Models an ADC (pdf, 373 kB)||Application Notes|
|AN-807: Multicarrier WCDMA Feasibility (pdf, 969 kB)||Application Notes|
AN-808: Multicarrier CDMA2000 Feasibility
(pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
|AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual (pdf, 2124 kB)||Application Notes|
|AN-935: Designing an ADC Transformer-Coupled Front End (pdf, 363 kB)||Application Notes|
|AN-835: Understanding High Speed ADC Testing and Evaluation (pdf, 985 kB)||Application Notes|
AN-586: LVDS Outputs for High Speed A/D Converters
(pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
|AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (pdf, 370 kB)||Application Notes|
AN-345: Grounding for Low-and-High-Frequency Circuits
(pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
|AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (pdf, 291 kB)||Application Notes|
AN-501: Aperture Uncertainty and ADC System Performance
(pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
|UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ) (pdf, 774 kB)||User Guides|
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
ADCs Offer True 16-bit Resolution
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
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ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
|ADIsim Design/Simulation Tools||HTML|
|AD9461 IBIS Models||IBIS Models||HTML|
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|Price*(100-499)||Price*1000 pcs||RoHS||View PCN/ PDN||Check Inventory/
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.