Измерение показателей жизнедеятельности
The AD8233 is an integrated signal conditioning block for electrocardiogram (ECG) and other biopotential measurement applications. It is designed to extract, amplify, and filter small biopotential signals in the presence of noisy conditions, such as those created by motion or remote electrode placement. This design allows an ultralow power analog-to-digital converter (ADC) or an embedded microcontroller to easily acquire the output signal.
The AD8233 implements a two-pole, high-pass filter for eliminating motion artifacts and the electrode half cell potential.This filter is tightly coupled with the instrumentation amplifier architecture to allow both large gain and high-pass filtering in a single stage, thereby saving space and cost.
An uncommitted operational amplifier enables the AD8233 to create a three-pole, low-pass filter to remove additional noise. The user can select the frequency cutoff of all filters to suit different types of applications.
To improve the common-mode rejection of the line frequencies in the system and other undesired interferences, the AD8233 includes a right leg drive (RLD) amplifier for driven electrode applications. The AD8233 includes a fast restore function that reduces the duration of the otherwise long settling tails of the high-pass filters. After an abrupt signal change that rails the amplifier (such as a leads off condition), the AD8233 automatically adjusts to a higher filter cutoff. This feature allows the AD8233 to recover quickly, and therefore, to take valid measurements soon after connecting the electrodes to the subject.
The AD8233 is available in a 2 mm × 1.7 mm, 20-ball WLCSP package and a 150 μm thin die for height constrained applications. Performance is specified from 0°C to 70°C and is operational from −40°C to +85°C.
- Fitness and activity heart rate monitors
- Portable ECG
- Wearable and remote health monitors
- Gaming peripherals
- Biopotential signal acquisition, such as EMG or EEG
The ADAS1000 measures electro cardiac (ECG) signals, thoracic impedance, pacing artifacts, and lead-on/lead-off status and output this information in the form of a data frame supplying either lead/vector or electrode data at programmable data rates. Its low power and small size make it suitable for portable, battery-powered applications. The high performance also makes it suitable for higher end diagnostic machines.
The ADAS1000 is a full-featured, 5-channel ECG including respiration and pace detection, while the ADAS1000-1 offers only ECG channels with no respiration or pace features. Similarly, the ADAS1000-2 is a subset of the main device and is configured for gang purposes with only the ECG channels enabled (no respiration, pace, or right leg drive).
The ADAS1000/ADAS1000-1/ADAS1000-2 are designed to simplify the task of acquiring and ensuring quality ECG signals. They provide a low power, small data acquisition system for biopotential applications. Auxiliary features that aid in better quality ECG signal acquisition include multichannel averaged driven lead, selectable reference drive, fast overload recovery, flexible respiration circuitry returning magnitude and phase information, internal pace detection algorithm operating on three leads, and the option of ac or dc lead-off detection. Several digital output options ensure flexibility when monitoring and analyzing signals. Value-added cardiac post processing is executed externally on a DSP, microprocessor, or FPGA. Because ECG systems span different applications, the ADAS1000/ADAS1000-1/ADAS1000-2 feature a power/noise scaling architecture where the noise can be reduced at the expense of increasing power consumption. Signal acquisition channels can be shut down to save power. Data rates can be reduced to save power.
To ease manufacturing tests and development as well as offer holistic power-up testing, the ADAS1000/ADAS1000-1/ADAS1000-2 offer a suite of features, such as dc and ac test excitation via the calibration DAC and cyclic redundancy check (CRC) redundancy testing, in addition to readback of all relevant register address space. The input structure is a differential amplifier input, thereby allowing users a variety of configuration options to best suit their application.
APPLICATIONSECG: Monitor & Diagnostic
- Bedside Patient Monitoring
- Portable Telemetry
- Cardiac Defibrillators
- Ambulatory Monitors
- Pace Maker Programmer
- Patient Transport
- Stress testing
AD8237 - это микропотребляющий инструментальный усилитель с нулевым дрейфом, обладающий rail-to-rail диапазонами входных и выходных напряжений (размах напряжения до напряжений питания). Коэффициент усиления может быть установлен равным любому значению в диапазоне от 1 до 1000 путем изменения отношения номиналов двух резисторов. AD8237 обладает превосходной погрешностью коэффициента усиления, которая поддерживается для любых настроек усиления при использовании двух резисторов с точным согласованием отношения номиналов.
Для обеспечения rail-to-rail размаха входных и выходных напряжений в AD8237 применяется архитектура с косвенной обратной связью по току. В отличие от стандартных измерительных усилителей AD8237 способен усиливать сигналы, синфазные напряжения которых равны напряжениям питания, или даже слегка выходят за их пределы. Это позволяет уменьшить напряжения питания и сократить потребляемую мощность в схемах с высокими синфазными напряжениями.
AD8237 является превосходным выбором для портативных систем. Благодаря минимальному напряжению питания 1.8 В, типичному потребляемому току 115 мкА и широкому диапазону входных напряжений AD8237 позволяет в полной мере использовать ограниченный бюджет энергопотребления, обеспечивая при этом показатели ширины полосы и дрейфа, которые отвечают требованиям к стационарным системам.
- Усиление сигналов мостовых схем
- Измерение давления
- Медицинские измерительные приборы
- Интерфейс с термопарами
- Портативные системы
- Измерение тока
Технологии оснащения зданий
- Системы управления и автоматизации зданий
Isolation in this circuit increases system safety and robustness by providing protection against electrical line surges and breaks the ground connection between bus and digital pins, thereby removing possible ground loops within the system.
The TIA/EIA RS-485 bus standard is one of the most widely used physical layer bus designs in industrial and instrumentation applications. RS-485 offers differential data transmission between multiple systems, often over very long distances. RS-485 communication offers additional robustness through differential communication when compared to the RS-232 standard.
TIA/EIA RS-232 devices are widely used in industrial machines, networking equipment, and scientific instruments. In modern personal computers, which are often used for debugging network problems, USB has displaced RS-232 from most of its peripheral interface roles, and many computers do not come equipped with RS-232 ports. The circuit in Figure 1 offers a robust and compact solution for both RS-232 and RS-485 interfaces.
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The circuit shown in Figure 1 is an ultralow power, multichannel data acquisition system that can be powered by a photovoltaic (PV) cell or thermoelectric generator (TEG). The circuit uses the industry’s lowest power, multichannel, 12-bit successive approximation analog-to-digital converter (SAR ADC), the AD7091R-5, along with an efficient energy harvesting circuit based on the ADP5090 boost regulator. The ADC has a typical power consumption of 100 μW on a single 3 V supply when sampling at 22 kSPS. Typical signal-to-noise ratio (SNR) is 68 dB for a 1 kHz input signal.
The low power consumption and small form factor make this combination of devices ideally suited for portable low power applications, particularly for wearable and self-powered devices.
Figure 1. Low Power Data Acquisition System with Energy Harvesting Circuit (Simplified Schematic: All Connections and Decoupling Not Shown)
The circuit in Figure 1 is a complete single-supply, low noise LED current source driver controlled by a 16-bit digital-to-analog converter (DAC). The system maintains ±1 LSB integral and differential nonlinearity and has a 0.1 Hz to 10 Hz noise of less than 45 nA p-p for a full-scale output current of 20 mA.
The innovative output driver amplifier eliminates the crossover nonlinearity normally associated with most rail-to-rail input op amps that can be as high as 4 LSBs or 5 LSBs for a 16-bit system.
This industry-leading solution is ideal for pulse oximetry applications where 1/f noise superimposed on the LED brightness levels affects the overall accuracy of the measurement.
Total power dissipation for the three active devices is less than 20 mW typical when operating on a single 5 V supply.
Figure 1. ±1 LSB Linear 16-Bit LED Current Source Driver (Simplified Schematic: All Connections and Decoupling Not Shown)
The circuit shown in Figure 1 yields accurate impedance measurements extending from the low ohm range to several hundred kΩ and also optimizes the overall accuracy of the AD5933/AD5934.
Figure 1. Optimized Signal Chain for Impedance Measurement Accuracy (Simplified Schematic, All Connections and Decoupling Not Shown)
The circuit shown in Figure 1 is an ultralow, power data acquisition system using the AD7091R 12-bit, 1 MSPS SAR ADC and an AD8031 op amp driver with a total circuit power dissipation of less than 5 mW on a single 3 V supply.
The low power consumption and small package size of the selected components makes this combination an industryleading solution for portable battery-operated systems where power dissipation, cost, and size play a critical role.
The AD7091R requires typically only 350 μA of supply current on the VDD pin at 3 V, which is significantly lower than any competitive ADC offering currently available in the market. This translates to ~1 mW typical power dissipation.
The AD8031 requires only 800 μA of supply current, that results in 2.4 mW typical power dissipation at 3 V supply, making the total power dissipation of the system less than 5 mW when sampling at 1 MSPS with a 10 kHz analog input signal.
Figure 1. 12-Bit, 1 MSPS Low Power ADC with Driver (Simplified Schematic: All Connections Not Shown)
The 3-axis accelerometer controls the high-side switch by monitoring the acceleration in three axes and closes or opens
the switch depending on the presence or absence of motion.
The ADXL362 is an ultralow power, 3-axis accelerometer that consumes less than 100 nA in wake-up mode. Unlike accelerometers that use power duty cycling to achieve low power consumption, the ADXL362 does not alias input signals by under sampling; it samples continuously at all data rates. There is also an on-chip, 12-bit temperature sensor accurate to ±0.5°.
The ADXL362 provides 12-bit output resolution and has three operating ranges, ±2 g, ±4 g, and ±8 g. It is specified over a minimum temperature range of −40°C to +85°C. For applications
where a noise level less than 480 μg/√Hz is desired, either of its two lower noise modes (down to 120 μg/√Hz) can be selected at a minimal increase in supply current.
The ADP195 is a high-side load switch designed for operation between 1.1 V and 3.6 V and is protected against reverse current flow from output to input. The device contains a low on-resistance, P-channel MOSFET that supports over 1.1 A of continuous load current and minimizes power losses.
(Simplified Schematic: Decoupling and All Connections Not Shown)
Basic Operation of the ADXL362
The ADXL362 is a three-axis, ultralow power acceleration measurement system capable of measuring dynamic acceleration (resulting from motion or shock) as well as static acceleration (that is, gravity).
The moving component of the sensor is a polysilicon, surface micromachined structure, also referred to as a beam, built on top of a silicon wafer. Polysilicon springs suspend the structure over the surface of the wafer and provide a resistance against acceleration forces.
Deflection of the structure is measured using differential capacitors. Each capacitor consists of independent fixed plates and plates attached to the moving mass. Any acceleration deflects the beam and unbalances the differential capacitor, resulting in a sensor output whose amplitude is proportional to acceleration. Phase-sensitive demodulation is used to determine the magnitude and polarity of the acceleration.
Modes of Operation
The three basic modes of operation for the ADXL362 are standby, measurement, and wake-up.
- Placing the ADXL362 in standby mode suspends measurement and reduces current consumption to 10 nA. Any pending data or interrupts are preserved; however, no new information is processed. The ADXL362 powers up in standby mode with all sensor functions turned off.
- Measurement mode is the normal operating mode of the ADXL362. In this mode, acceleration data is continuously read, and the accelerometer consumes less than 3 μA across its entire range of output data rates of up to 400 Hz using a 2.0 V supply. All described features are available while operating in this mode. The ability to continuously output data from the minimum 12.5 Hz to the maximum 400 Hz data rate while still delivering less than 3 μA of current consumption is what defines the ADXL362. as an ultralow power accelerometer. Under sampling and aliasing do not occur with the ADXL362. because it continuously samples the full bandwidth of its sensor at all data rates.
- Wake-up mode is ideal for simple detection of the presence or absence of motion at extremely low power consumption (270 nA at a 2.0 V supply voltage). Wake-up mode is useful particularly for implementation of a motion-activated on/off switch, allowing the rest of the system to be powered down until activity is detected. Wake-up mode reduces current consumption to a very low level by measuring acceleration only 6 times a second to determine whether motion is present. In wake-up mode, all accelerometer features are available with the exception of the activity timer. All registers are accessible, and real-time data is available from the part.
The CN0274 evaluation software uses the wake-up mode of the ADXL362. That is, the ADXL362 is asleep until it detects motion at which point it enters measurement mode.
The ADXL362 offers a few options for decreasing noise at the
expense of only a small increase in current consumption.
The noise performance of the ADXL362 in normal operation, typically 7 LSB rms at 100 Hz bandwidth, is adequate for most applications, depending upon bandwidth and the desired resolution. For cases where lower noise is needed, the ADXL362 provides two lower noise, operating modes that trade reduced noise for somewhat higher supply current.
Table 1. ADXL362 Noise vs. Supply Current
Table 1 shows the supply current values and noise densities
obtained for normal operation and the two lower noise modes,
at a typical 3.3 V supply.
The CN0274 evaluation software uses the normal operation noise mode of the ADXL362.
The ADXL362 has built-in logic that detects activity (acceleration
above a certain threshold) and inactivity (lack of acceleration above a certain threshold).
Detection of an activity or inactivity event is indicated in the status register and can also be configured to generate an interrupt.
In addition, the activity status of the device, that is, whether it is moving or stationary, is indicated by the AWAKE bit.
Activity and inactivity detection can be used when the accelerometer is in either measurement mode or wake-up mode.
An activity event is detected when acceleration stays above a specified threshold for a user-specified time period. The two activity detection events are absolute and referenced.
- When using absolute activity detection, acceleration samples are compared to a user set threshold to determine whether motion is present. For example, if a threshold of 0.5 g is set, and the acceleration on any axis is 1 g for longer than the user defined activity time, the activity status is asserted. In many applications, it is advantageous for activity detection to be based not on an absolute threshold but on a deviation from a reference point or orientation. This is particularly useful because it removes the effect on activity detection of the static 1 g imposed by gravity. When an accelerometer is stationary, its output can reach 1 g, even when it is not moving. In absolute activity, if the threshold is set to less than 1 g, activity is immediately detected in this case.
- In the referenced activity detection, activity is detected when acceleration samples are at least a user set amount above an internally defined reference, for the user defined amount of time. The reference is calculated when activity detection is engaged, and the first sample obtained is used as a reference point. Activity is only detected when the acceleration has deviated sufficiently from this initial orientation. The referenced configuration results in a very sensitive activity detection that detects even the most subtle motion events.
The CN0274 evaluation software uses the referenced mode of operation when searching for activity.
An inactivity event is detected when acceleration remains below a specified threshold for a specified time. The two inactivity detection events are absolute and referenced.
- In absolute inactivity detection, acceleration samples are compared to a user set threshold for the user set time to determine the absence of motion.
- In referenced inactivity detection, acceleration samples are compared to a user specified reference for a user defined amount of time. When the part first enters the awake state, the first sample is used as a reference point, and the threshold is applied around it. If the acceleration stays inside the threshold, the part enters the asleep state. If an acceleration value moves outside the threshold, this point is then used as a new reference, and the thresholds are reapplied to this new point.
The CN0274 evaluation software uses the referenced mode of operation when searching for inactivity.
Linking Activity and Inactivity Detection
The activity and inactivity detection functions can be used concurrently, and processed manually by a host processor, or they can be configured to interact in several ways:
- In default mode, activity and inactivity detection are both enabled, and all interrupts must be serviced by a host processor; that is, a processor must read each interrupt before it is cleared and can be used again.
- In linked mode, activity and inactivity detection are linked to each other such that only one of the functions is enabled at any given time. Once activity is detected, the device is assumed moving or awake and stops looking for activity: inactivity is expected as the next event so only inactivity detection operates. When inactivity is detected, the device is assumed stationary or asleep. Activity is now expected as the next event so that only activity detection operates. In this mode, a host processor must service each interrupt before the next is enabled.
- In loop mode, motion detection operates as previously described in linked mode; however, interrupts do not need to be serviced by a host processor. This configuration simplifies the implementation of commonly used motion detection and enhances power savings by reducing the amount of power used in bus communication.
- When enabling autosleep mode in linked mode or loop mode, it causes the device to autonomously enter wake-up mode when inactivity is detected, and reenter measurement mode when activity is detected.
The CN0274 evaluation software uses the autosleep and loop modes to demonstrate the functionality of the ADXL362.
The AWAKE Bit
The AWAKE bit is a status bit that indicates whether the ADXL362 is awake or asleep. The device is awake when it has seen an activity condition, and the device is asleep when it has seen an inactivity condition.
The awake signal can be mapped to the INT1 or INT2 pin and can thus be used as a status output to connect or disconnect power to downstream circuitry based on the awake status of the accelerometer. Used in conjunction with loop mode, this configuration implements a trivial, autonomous motion-activated switch.
If the turn-on time of the downstream circuitry can be tolerated, this motion switch configuration can save significant system-level power by eliminating the standby current consumption of the rest of the application. This standby current can often exceed the full operating current of the ADXL362.
Several of the built-in functions of the ADXL362 can trigger interrupts to alert the host processor of certain status conditions.
Interrupts may be mapped to either (or both) of two designated output pins, INT1 and INT2, by setting the appropriate bits in the INTMAP1 and INTMAP2 registers. All functions can be used simultaneously. If multiple interrupts are mapped to one pin, the OR combination of the interrupts determines the status of the pin.
If no functions are mapped to an interrupt pin, that pin is automatically configured to a high impedance (high-Z) state. The pins are placed in this state upon a reset as well.
The INT pins may be connected to the interrupt input of a host processor and interrupts responded to with an interrupt routine. Because multiple functions can be mapped to the same pin, the STATUS register can be used to determine which condition caused the interrupt to trigger.
The CN0274 evaluation software configures the ADXL362 such that when activity is detected, the INT1 pin is high, and when inactivity is detected, the INT1 pin is low.
All testing was performed using the EVAL-CN0274-SDPZ and the EVAL-SDP-CS1Z. Functionality of the part is demonstrated by setting the activity threshold at 0.5 g, the inactivity threshold at 0.75 g, and the number of inactivity samples at 20. When looking for activity, only one acceleration sample on any axis is required to cross the threshold.Starting with the circuit oriented so that the battery pack is flat against the table, the printed circuit board (PCB) can be slowly rotated 90° in any direction causing the acceleration to cross the threshold as it approaches perpendicular to the initial orientation.
Figure 2 shows a screen shot of the CN0274 evaluation software showing the ADXL362 first asleep, looking for activity. Then, when Sample 11 crosses the threshold, the ADXL362 enters the awake state and begins looking for inactivity. The thresholds adjust to show the device is now looking for inactivity.
The output of the ADP195, or the interrupt pin itself, was measured using a digital multimeter. When the ADXL362 is awake, the interrupt goes high and drives the EN pin of the ADP195, high, which in turn drives the gate of the MOSFET low, causing the switch to close, connecting any downstream circuitry to the power supply. Conversely, when the ADXL362 is asleep, the interrupt drives the EN pin of the ADP195 low, which in turn drives the gate of the MOSFET high, causing the switch to open.
PCB Layout Considerations
In any circuit where accuracy is crucial, it is important to consider the power supply and ground return layout on the board. The PCB should isolate the digital and analog sections as much as possible. The PCB for this system was constructed in a 4-layer stack up with large area ground plane layers and power plane polygons. See the MT-031 Tutorial for more discussion on layout and grounding, and the MT-101 Tutorial for information on decoupling techniques.
Decouple the power supply to the ADXL362 with 1 μF and 0.1 μF capacitors to properly suppress noise and reduce ripple. Place the capacitors as close to the device as possible. Ceramic capacitors are advised for all high frequency decoupling.
Power supply lines should have as large a trace width as possible to provide low impedance paths and reduce glitch effects on the supply line. Shield clocks and other fast switching digital signals from other parts of the board by digital ground. A photo of the PCB is shown in Figure 3.
A complete design support package for this circuit note can be found at www.analog.com/CN0274-DesignSupport.
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The ADuM4160 is designed primarily as an isolation element for a peripheral USB device. However, there are occasions when it is useful to isolate a host device. Several issues must be addressed to use the ADuM4160 for this application. Whereas the buffers on the upstream and downstream sides of the ADuM4160 are the same and capable of driving a USB cable, the downstream buffers must be capable of adjusting speed to a full or low speed peripheral that is connected to it.
Unlike the case of building a dedicated peripheral interface where the speed is known and not changed, host applications must adapt. The ADuM4160 is intended to be hardwired to a single speed via pins; therefore, it works when the peripheral plugged into its downstream side is the correct speed, but it fails when the wrong speed peripheral is attached. The best way to address this is to combine the ADuM4160 with a hub controller.
The upstream side of a hub controller can be thought of as a standard fixed speed peripheral port that can be easily isolated with the ADuM4160, whereas the speed of the downstream ports is handled by the hub controller. The hub controller converts peripherals of different speeds to match the upstream port speed. The circuit shown in Figure 1 shows how a two-port hub chip can be used to isolate two downstream host ports in a design that can be made fully compliant with the USB specification.
Figure 1. USB Cable Isolator Circuit
The ADuM4160 provides an inexpensive and easy to implement isolation buffer for medical and industrial peripherals. The challenge that must be met is to use this to create a fully com-pliant host port by pairing the ADuM4160 with a hub chip. As with isolating any peripheral device, the services that the ADuM4160 and hub provide are as follows:
- Directly isolates, in the upstream, the USB D+ and D− lines of a hub chip, allowing the hub to manage the downstream host port activity.
- Implements an automatic scheme for data flow of control that does not require external control lines.
- Provides medical grade isolation.
- Allows creation of one or more host ports that meet the USB-IF certification standards.
- Supports full speed signaling rates.
- Supports flexible power configurations.
The goal of the application circuit is to isolate a hub as if it were a full speed peripheral device. The hub or host function requires that 2.5 W of power be available to each downstream port. Power to run the downstream side of the isolator and power the hub and ports is provided as part of the solution. The application circuit is typical of many medical and industrial applications.
- Isolate directly in the USB D+ and D− lines allowing the use of existing USB infrastructure in microprocessors.
- Implement an automatic scheme for data flow of control that does not require external control lines.
- Provide medical grade isolation.
- Allow a complete peripheral to meet the USB-IF certifi-cation standards.
- Support full speed (12 Mbps) and low speed (1.5 Mbps) signaling rates.
- Support flexible power configurations.
The application circuit shown is typical of many medical and industrial applications.
Figure 1. USB Peripheral Isolator Circuit
The ADuM4160 is designed primarily as an isolation element for a peripheral USB device. However, there are occasions when it is useful to create an isolated cable function. Several issues must be addressed to use the ADuM4160 for this application. Whereas the buffers on the upstream and downstream sides of the ADuM4160 are the same and capable of driving a USB cable, the downstream buffers must be capable of adjusting speed to a full or low speed peripheral that is connected to it. The upstream connection must act like a peripheral, and the downstream connection must behave like a host.
Unlike the case of building a dedicated peripheral interface where the speed is known and not changed, host applications must adapt to detect whether a low or full speed device has been connected. The ADuM4160 is intended to be hardwired to a single speed via pins; therefore, it works when the peripheral plugged into its downstream side is the correct speed, but it fails when the wrong speed peripheral is attached. The best way to address this is to combine the ADuM4160 with a hub controller.
The upstream side of a hub controller can be thought of as a standard fixed speed peripheral port that can be easily isolated with the ADuM4160, whereas the downstream ports are all handled by the hub controller. However, in many cases, while it is not certifiable as fully USB compliant, a single speed cable is acceptable from a practical standpoint, especially if custom connectors are used so that it cannot be confused with a compliant device. The hub chip can be eliminated, and the design becomes very small and simple.
The ADuM4160 provides an inexpensive and easy way to implement an isolation buffer for medical and industrial peripherals. The challenge that must be met is to use this to create a bus-powered cable isolator by pairing the ADuM4160 with a small isolated dc-to-dc converter such as the ADuM5000. As with isolating any device, the services that the ADuM4160 provides are as follows:
- Directly isolates, in the upstream, the USB D+ and D− lines of a cable.
- Implements an automatic scheme for data flow of control that does not require external control lines.
- Provides medical grade isolation.
- Supports full speed or low speed signaling rates.
- Supports isolated power delivery through the cable.
Figure 1. USB Cable Isolator Circuit
The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing appli-cations, as well as dynamic acceleration resulting from motion or shock. Its high resolution (4 mg/LSB) enables measurement of inclination changes of about 0.25°. Using a digital output accelerometer such as the ADXL345 eliminates the need for analog-to-digital conversion, reducing system cost and real estate. Additionally, the ADXL345 includes a variety of built-in features. Activity/inactivity detection, tap/double-tap detection, and free-fall detection are all done internally with no need for the host processor to perform any calculations. A built-in 32-stage FIFO memory buffer reduces the burden on the host processor, allowing algorithm simplification and power savings. Additional system level power savings can be implemented using the built-in activity/inactivity detection and by using the ADXL345 as a “motion switch” to turn the whole system off when no activity is felt and on when activity is sensed again.
The ADXL345 communicates via I2C or SPI interface. The circuits described in this document demonstrate how to implement communication via these protocols.
Figure 2. ADXL345 and ADuC7024 in I2C Configuration (Simplified Schematic: Decoupling and All Connections Not Shown)
The circuit can process eight gain-independent channels and is compatible with both single-ended and differential input signals.
The analog front end includes a multiplexer, programmable gain instrumentation amplifier (PGIA); precision analog-to-digital converter (ADC) driver for performing the single-ended to differential conversion; and an 18-bit, 1 MSPS PulSAR® ADC for sampling the signal on the active channel. Gain configurations of 0.4, 0.8, 1.6, and 3.2 are available.
The maximum sample rate of the system is 1 MSPS. The channel switching logic is synchronous to the ADC conversions, and the maximum channel switching rate is 1 MHz. A single channel can be sampled at up to 1 MSPS with 18-bit resolution. Channel switching rates up to 750 kHz also provide 18-bit performance. The system also features low power consumption, consuming only 240 mW at the maximum ADC throughput rate of 1 MSPS.
This approach is highly useful in portable battery powered or multichannel applications, or where power dissipation is critical. It also provides benefits in applications where the ADC is idle most of the time between conversion bursts.
Drive amplifiers for high performance successive approximation ADCs are typically selected to handle a wide range of input frequencies. However, when an application requires a lower sampling rate, considerable power can be saved because reducing the sampling rate reduces the ADC power dissipation proportionally.
To take full advantage of the power saved by reducing the ADC sampling rate, a low bandwidth, low power amplifier is required. For instance, the 80 MHz ADA4841-1 op amp (12 mW at 10 V) is recommended for operation with the AD7988-1 16-bit successive approximation register (SAR) ADC (0.7 mW at 100 kSPS). The total system power dissipation including the ADR435 reference (4.65 mW at 7.5 V) is 17.35 mW at 100 kSPS.
For input bandwidths up to 1 kHz and sampling rates of 100 kSPS, the 3 MHz AD8641 op amp (2 mW at 10 V) offers excellent signal-to-noise ratio (SNR) and total harmonic distortion (THD) performance and reduces total system power from 17.35 mW to 7.35 mW, which is a 58% power savings at 100 kSPS.
Figure 1 shows a top level diagram of the physical connections in a typical 5-lead (four limb and one precordial chest lead) ECG measurement system, including features such as respiration and pace detection. The configuration is typical for portable telemetry ECG measurements or a minimum lead set from a line powered bedside instrument.
An ECG signal has a small amplitude of typically around 1 mV when measured on the surface of the skin. Important information about the health or other characteristics of the patient is stored within that small signal; therefore, requiring measurement sensitivity in the μV level. At the system level, various medical standards call for a maximum of 30 μV p-p noise; however, designers typically target less than this. As a result, when designing a solution suitable for system level requirements, all noise sources must be considered.
The noise performance of the ADAS1000 is specified across various different operating conditions. The power supply must be designed to ensure that it does not degrade the overall performance. Selection of the ADP151 linear regulator was based on its ultralow noise performance (9 μV rms typical, 10 Hz to 100 kHz), coupled with the power supply rejection of the ADAS1000, ensures that the noise of the ADP151 does not degrade the overall noise performance.
Figure 1. Simplified Block Diagram Showing the ADAS1000 as Used in a Typical 4-Electrode + RLD or 5-Lead Configuration (All Connections and Decoupling Not Shown)
Other suitable applications for this circuit are as an analog opto-isolator. It can also be adapted to applications that require larger bandwidth and less resolution such as adaptive speed control systems.
This circuit note discusses the design steps needed to optimize the circuit shown in Figure 1 for a specific bandwidth including stability calculations, noise analysis, and component selection considerations.
The circuit in Figure 1 is a two-channel, bank isolated, wide bandwidth data acquisition (DAQ) system, implemented with a simultaneous sampling architecture using an analog-to-digital converter (ADC) per channel. The system achieves high channel density along with isolation between the bank and the digital backplane, all while delivering exceptional performance. The design also makes efficient use of isolation channels by configuring the ADCs in daisy-chain mode and utilizing an isolator product with a trimmed delay clock feature. Power generation is also simplified using an isolator with an integrated pulse width modulation (PWM) controller and transformer driver to perform dc-to-dc conversion across the isolation barrier. The system also includes many common features of a typical DAQ signal chain, including input circuit protection, programmable gain channels, high accuracy, and high performance.
The simultaneous sampling realizes multiple channels without sample rate limitations inherent in multiplexed DAQ signal chains. The analog front end (AFE) design is also simpler than the multiplexed option, because the settling performance requirements of the system are less demanding. Sampling occurs simultaneously for each channel, while sequential sampling systems have delays between channels.
Digital bank isolated DAQ designs provide protection for digital back end circuitry and reduce ground loop and common-mode interference between banks. They feature multiple DAQ signal chains per ground plane, and can be implemented with fewer digital isolation devices than channel-to-channel isolated systems.
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