CN0296

The circuit has two main blocks. First is the audio input and processing block, which is made of the ADAU1761. Second is the output amplifier stage, which is composed of the SSM2518.

Audio Input and Processing

The input path of the ADAU1761 can accept two channels of single ended or differential audio simultaneously. The inputs are sent to the DSP core of the ADAU1761 for processing. Audio signal path and processing algorithms are created using Analog Devices SigmaStudio software. The built-in libraries in SigmaStudio allow different processing blocks to be added to the signal flow. Once programmed, the different blocks, such as volume control, equalizers and filters, are fully user-controllable. The software speeds development time; allowing designers to quickly test and debug their algorithms and configurations in an easy-to-use graphical interface.

Class-D Output Amplifier

The SSM2518 class-D audio power amplifier receives the serial data, performs the digital-to-analog conversion, and drives the loudspeakers. Each SSM2518 is capable of driving two channels with a continuous power of 2 watts each into 4-ohm speakers. The circuit makes use of four SSM2518s and can output eight channels of audio. The channel mapping feature allows each SSM2518 to output two channels from the interface. With this feature, each SSM2518 can output different channels.

I²C Access and Configuration Registers

The ADAU1761 and SSM2518 both have internal registers that need to be configured for proper operation. A microcontroller or a host configures the registers of the devices using the I²C interface. The SSM2518 has an address pin that allows only two devices to have a unique address on the I²C bus. The four SSM2518 devices are configured by driving the ADDR pin of the one device HIGH while keeping the other three at a LOW level or keeping one LOW while the others are HIGH. The device with the unique address can now communicate with the bus and be configured. The process is repeated for the other three devices. The address control can performed by a system controller that controls the logic level of the address pins.

Serial Data Interface

The serial data interface transmits audio using I²S or TDM compatible data streams. The signals that are transmitted are the bit clock (BCLK), frame clock (LRCLK), and the data (SDATA). The ADAU1761 is configured as the master, making it the source of the BCLK, LRCLK and SDATA sent to the SSM2518. For proper operation, the devices must have synchronized master clocks, MCLK. Typically, a 12.288 MHz crystal oscillator is used as the master clock. The on-chip frequency multiplier/divider of the ADAU1761 and SSM2518 can generate their required internal clocks. Special layout precautions must be observed with the clock and signal lines. The input capacitance of the ADAU1761 and SSM2518 must be taken into account to maintain clock and signal integrity. Buffers may be needed to avoid loading effects.

The serial data signals can be configured as I²S, TDM-4, or TDM-8 to carry two, four, or eight audio channels in each audio frame, respectively.

Output Noise Voltage and Signal-to-Noise Ratio Performance

To measure output noise voltage, connect the inputs to ground or terminate them with the proper impedance, and measure the output voltage at the amplifier outputs. The voltage measurement is done over a bandwidth of 22 Hz to 22 kHz with an A-weighting filter. The average noise measured on all eight channels is 66 μV rms. The signal-to-noise ratio referenced to a 2 W output and a 4 Ω load is greater than 90 dB for all channels.

Output Power and Distortion Performance

Output power and THN+N is measured by applying a pure tone as an input and taking measurements at the output of the amplifiers using an audio analyzer. Using a 1 kHz sine wave as the input, the circuit provides good performance by having a less than 1% THD+N at the rated output power of 2 W as shown in Figure 2.

Frequency Response Performance

Frequency response is measured by applying a pure sine wave to the input at a fixed voltage level, while the frequency is swept across the audio spectrum of 20 Hz to 20 kHz. The voltage is measured at the output and is compared to the 1 kHz reference level. Output power is set to 2 W at 1 kHz. The data shows that the change in the output at different frequencies is less than ±0.5 dB. The THD+N is also less than 1% across the spectrum, as shown in Figure 3.