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Evaluation Hardware

Part Numbers with "Z" indicate RoHS Compliance. Boards checked are needed to evaluate this circuit.

  • EVAL-CN0579-ARDZ ($225.00) Quad-Channel IEPE Vibration Sensor Measurement System
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Features & Benefits

  • Quad Channel IEPE-Compatible Vibration Sensor Interface
  • Channel Independent Excitation Source and Sensor Bias Removal Circuitry
  • Analog Overvoltage and Undervoltage Protection
  • Sensor Frequency Response from DC up to 54 kHz
  • Synchronized, Full Bandwidth Data Measurement and Capture

Documentation & Resources

Circuit Function & Benefits

Condition-based monitoring (CbM) enables early detection and diagnosis of machine and system abnormalities. CbM typically uses data from vibration, current, and temperature which provide key insights into the health of equipment ranging from motors and pumps to bearings and encoders. These machine health insights result in increased productivity, improved efficiency, and maximum uptime. Ultimately, by tracking the vibration analysis data over time, a fault or failure can be predicted, along with the source of the fault.

Vibration detection is the most popular method used in machine condition-based monitoring. This is done by collecting large datasets, used to identify a baseline operating condition for the equipment in both normal operating modes and failure scenarios to create an accurate understanding of the machinery. Once this information has been gathered, an algorithm or threshold detection procedure can be developed to monitor and analyze the equipment.

The reference design shown in Figure 1 is a 4-channel, high resolution, wide bandwidth, high dynamic range, integrated electronics piezoelectric (IEPE)-compatible interface data acquisition (DAQ) system that interfaces with IC piezoelectric (ICP®)/IEPE sensors. The solution provides flexible sensor interfacing to either piezoelectric or micro-electromechanical systems (MEMS) sensor with measurement capabilities that extend the frequency response to DC. The design provides four channels of full bandwidth, synchronized vibration data to the processor, where data analysis can be done locally or on a remote host over Ethernet via standard IIO framework. Large buffers of continuous data can be streamed and analyzed using standard fast Fourier transform (FFT) techniques for system characterization and machine learning algorithms.

Each channel includes an analog input protection circuitry and a software-configurable sensor bias removal circuit. Independent excitation current sources allow customized sensor options to be either enabled or disabled when connected. The board comes in an Arduino-compatible form factor that can be interfaced and powered directly from most Arduino form-factor FPGA development boards.

Figure 1. CN0579 Simplified Block Diagram

Circuit Description


Piezoelectric (piezo) and MEMS are two different types of sensor technologies commonly used for measuring physical parameters such as acceleration, pressure, and temperature. The choice between these technologies can impact the way the sensor responds to different input signals, including AC and DC signals, and how it affects the frequency response.

Traditionally, piezoelectric vibration sensors have been the benchmark for vibration monitoring and are still the sensor of choice in the highest sensitivity applications, or where very high accelerations are involved. Piezo sensors are also relatively expensive and the frequency response does not extend to DC (0 Hz).

MEMS sensors were previously deemed unusable due to their limited bandwidth, g-range, and noise performance across frequency. Recent advancements in MEMS sensor technology (especially with respect to frequency response and noise performance) make MEMS sensors a viable alternative in many CbM applications. MEMS sensors are typically smaller and lower cost, and have a frequency response that extends to DC (0 Hz).


The IEPE standard is a prominent signaling interface standard for today's high-end piezoelectric and MEMS sensors. The CN0579 is compatible with most IEPE vibration sensors since these sensors work on the same principle, with just some variations on the offset voltages, noise levels, bandwidths, and sensitivities.

An IEPE output signal carries both AC and DC voltages, where the vibration dependent AC voltage is DC-shifted to some voltage level typically between 7 V and 13 V. This DC level varies from sensor to sensor, and for any given sensor, it has a drift component with respect to time, temperature, and excitation current.

The IEPE sensor must be powered by a current source with a sufficiently high voltage range to fully cover the amplitude of the sensor. A typical excitation voltage of the IEPE sensors is 24 V. The CN0579 can accommodate sensors with a bias voltage up to 13 V, and a signal amplitude of 10 V p-p. The CN0579 also allows connection to voltage output vibration sensors by disabling the excitation current sources.

Input Protection

IEPE sensors are typically employed in electrically noisy industrial environments, where long sensor cables can pick up RF interference, ESD strikes, and other faults resulting in voltages outside the DAQ system's allowable input range.

The ADG5421F is an input protection switch that automatically detects overvoltage conditions and open circuits the sensor from the data acquisition signal path. For the switches to be closed, input signal voltage levels from the sensor must be within the upper and lower power supply rails by a specified voltage threshold.

The ADG5421F also provides a fault flag (FF) that can be used as an interrupt into a controller to alert the operator that an input fault has occurred. In normal operation the FF pin is pulled high, however, if either of the switches experience an over or under voltage condition, the FF is pulled low to indicate a fault has occurred.

IEPE Excitation

Take noise performance into account when creating the constant current source (CCS). Operating within signal lines as a 2-terminal current source setup, the LT3092 is well-suited for effectively driving sensors, remote supplies, and acting as a precise current limiter for local supply applications.

Figure 2. Constant Current Source

Figure 2 depicts a 2-terminal current source with Resistors RSET and ROUT setting the output current to 4.5 mA and Capacitor CSET limiting the bandwidth of the current noise. The internal 10 μA reference current source of the LT3092 holds a stable VSET across RSET. The VSET is mirrored across ROUT, which sets the output current according to Equation 1:

Equation for output current

IOUT is the constant current output.
ROUT is the current output set resistance.
RSET is the current input set resistance.

Note that the actual IOUT current is 10 μA larger than the output current given by Equation 1 because of the internal reference current flowing from the SET terminal.

IEPE Sensor Bias Removal

Each individual IEPE vibration sensor has an initial DC bias voltage that must be eliminated because this voltage does not carry any useful information. The CN0579 includes precision per-channel adjustable DC bias compensation that nulls out this voltage, allowing both the DC and AC content of the input signal to be accurately measured.

Figure 3 shows the DC bias removal circuitry, which can offset a sensor bias voltage up to 13 V. This voltage level shifter can withstand a sensor offset voltage of up to 13 V and a signal swing of up to 10 V p-p, making it suitable for the majority of piezoelectric sensors. The output of the level shifter is a pseudo-differential signal referred to a 2.5 V bias (VOCM), which drives the input of a fully-differential amplifier (FDA) in the following stage. A positive shifting voltage is necessary to lower the input voltage to satisfy the FDA stage input requirements, and is calculated using Equation 2:

Figure 3. IEPE Sensor Bias Voltage Correction Circuitry


Equation for FDA Stge input requirements

VSHIFT is the required level shift voltage.
VIEPE_INPUT_BIAS is the input bias voltage.
VIEPE_SHIFTED is 2.52 V (must be equal to VOCM).
G is 0.3 (computed as RF/RIN).

The AD5696R digital-to-analog converter (DAC) provides the level shift. The required digital code is calculated using Equation 3:

Equation for digital code

VSHIFT is the level shift voltage.
VREF is the voltage reference of AD5686R.
Gain is the gain setting of AD5686R.
D is the digital code.
N is the number of bits of AD5686R (16-bit).

Figure 4 shows the required VSHIFT and corresponding output codes for sensor bias voltages from 0 V to 13 V. Note that the minimum input voltage is zero volts, limited by the ADG5421 VSS supply being tied to ground. For example, a sensor with a 4 V bias will be limited to 8 Vp-p.

Figure 4. Level Shifting Voltage and DAC Code vs. Sensor Bias Voltage

The internal buffer of the DAC helps in limiting voltage noise, however an additional filtering mechanism is needed to further refine the output. By default, the DAC utilizes a 2.5 V reference, it is necessary to amplify the DAC output to provide a voltage range of 0 V to 5 V. This amplification ensures compatibility with the desired voltage range.

Figure 3 illustrates the level shifting DAC with a gained output using a low-pass Sallen-Key filter configuration. The filter's cutoff frequency, which determines the range of frequencies allowed to pass through, has been intentionally set to a low value of 147.71 Hz. This specific cutoff frequency can be set using Equation 4:

Equation for specific cutoff frequency

fc is the low pass cutoff frequency.

When applying a gain to the Sallen-Key filter topology, it is crucial to consider the stability of the filter. Otherwise, there is a risk of the buffer becoming an oscillator. Another important factor in relation to stability is the quality factor (Q) of the filter, which must be taken into account for this particular function.

Maintaining a sufficiently low Q factor (below 0.707) ensures that the frequency response does not exhibit peaking at the cutoff frequency. Additionally, having a low Q factor results in gentler roll-offs that begin significantly earlier than the cutoff frequency. This characteristic is desirable for achieving high linearity across the frequency range. It is important to note that the structure becomes unstable if the Q factor becomes negative.


Figure 5 shows the implementation of the antialiasing filter and FDA in the CN0579. The antialiasing filter and FDA employ a differential multiple feedback low-pass structure, enabling the conversion of a single-ended signal to a differential signal. The cutoff frequency of the antialiasing filter has been specifically set to 54 kHz, which surpasses the bandwidth requirements of most vibration sensors. This filter exhibits a stopband rejection of -80 dB at 2.3 MHz.

Figure 5. FDA and ADC Interface

To optimize the SNR and utilize the full scale input range of the ADC, the gain of the FDA has been configured as 2.66. Although the FDA also amplifies the wideband noise, its impact is not as significant as the improvement in signal quality due to the gain adjustment. This is primarily because the antialiasing filter effectively constrains the wideband noise, limiting its impact.


The CN0579 supports simultaneous sampling through the quad-channel AD7768-4 ADC. The 4-channel architecture allows users to convert multiple sensors at once to monitor one or more assets.

This ADC utilizes a sigma-delta (Σ-Δ) modulation technique providing a resolution of 24-bits, an analog input bandwidth of 110.8 kHz, and is equipped with power scaling capabilities. Each channel of the AD7768-4 incorporates its own Σ-Δ modulator and digital filter, enabling synchronized sampling of both AC and DC signals. This feature allows for precise and accurate data acquisition, providing a dynamic range of 108 dB with a maximum input bandwidth of 110.8 kHz. Additionally, this device has a typical integral nonlinearity (INL) of ±2 ppm, an offset error of ±50 μV, and a gain error of ±30 ppm.

The AD7768-4 supports a 5 V reference voltage and converts the differential voltage between the analog inputs, AINx+ and AINx−, into a digital output. These analog inputs can be configured as either differential or pseudo differential.

In the pseudo differential mode, one of the analog inputs (either AINx+ or AINx−) can be connected to a constant input voltage, such as 0 V, GND, AVSS, or another reference voltage. To maximize the ADC input range, it is recommended to set the commonmode voltage of the analog inputs, AINx+ and AINx−, to half of the positive supply voltage. This configuration allows for optimal utilization of the ADC's input range.

The AD7768-4 operating mode is configured via a standard SPI interface. The ADC data is output via a single-ended CMOS, 4-lane, source-synchronous, serialized interface with DRDY frame signal. The resulting 24-bit digital conversion output is in two's complement format, with the most significant bit (MSB) transmitted first. The DCLK frequency can be as high as 32 MHz, with fast edge rates. Keep traces as short as possible, and perform a signal integrity analysis of the layout.


Fast Fourier Transform techniques are used to test the ADC’s frequency response, distortion, and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algorithm, the ADC’s spectral content can be examined for frequencies outside the fundamental. Figure 6 shows the proper connection of the CN0579 to the audio analyzer for signal-to-noise (SNR), total harmonic distortion (THD), and spurious-free dynamic range (SFDR) testing.

Figure 6. CN0579 Test Setup for SNR, THD, and SFDR Analysis

With the input of 10 Vp-p from the audio precision and a 10 DC offset added, the SNR, THD, and SFDR were collected on varying frequency from 1 kHz, 20 kHz, and 40 kHz. Figure 7 shows the FFT performance of the CN0579 with 1 kHz input.

Figure 7. CN0579 FFT Performance with 1 kHz Input Signal

Figure 8 shows the calculated SNR, SFDR, and THD of all four channels at frequencies of 1 kHz, 20 kHz, and 40 kHz.

Figure 8. CN0579 SNR, THD, SFDR Measurements vs. Frequency Input Signal


The ADC offers various options for power scaling, filtering, and sample rates, allowing optimization to address specific constraints such as noise levels, bandwidth requirements, and power consumption. Providing many advantages when gathering data for analysis and ultimately implementing an effective predicative maintenance strategy.

Combining the flexible options within the ADC, existing software, and available tools will help accelerate the data collection process, and performance analysis required for the application.

Raw data is captured by the platform's FPGA and stored in a DMA buffer. Data can be processed locally, or exported to higher level tools like MATLAB or Python for further analysis and development of CbM detection algorithms.


The CN0579 incorporates an efficient power solution that enables the entire signal chain to be powered by a single 5 V or 3.3 V power rail. This optimized power arrangement simplifies the overall power distribution and ensures that the system operates effectively with a single voltage source. Figure 9 presents the complete power architecture of CN0579.

Figure 9. CN0579 Power Tree

To ensure compatibility with most Arduino form-factor FPGA development boards, the board's power solution has been specifically engineered to operate using a single 3.3 V or 5 V supply. This supply voltage is typically sourced from Arduino-compatible boards. The LT8333 DC-DC converter has the capability to boost the 5 V or 3.3 V to 26.8 V, and then the on-board ADP7142 low dropout linear regulator lowers this voltage to 26 V.

Common Variations

If the application requires a bandwidth greater than 110 kHz,the AD4134 ADC is an alternative with a wideband response to 162 kHz. This device has a higher sampling rate and higher overall performance.

The AD4020 and lower resolution variants are SAR ADCs suitable for applications in which custom digital filters are implemented in an FPGA.

The ADA4610-1 is suitable for use in the first stage signal conditioning and for level shifting but requires higher supply voltages for correct operation.

The ADA4807-1 and ADA4940-1 are alternatives for the ADC input antialiasing filter and driver stage.

The ADAQ7980/ADAQ7988 are 16-bit ADC μModule® data acquisition systems that integrate the ADC and the ADC driver stage, as well as the most critical passive components into a system in package (SiP) design. These devices are recommended where size or simplicity of implementation is more critical. These options allow the signal chain components to be selected based on performance (noise or linearity), solution size, and cost.

Analog Devices, Inc. also offers other IEPE-compatible data acquisition systems. The CN0540 is an alternative reference design for vibration sensing applications that require single channel only. The CN0582 quad-input channel DAQ is a reference design suitable for USB-based applications. For complete details, refer to the CN0540 and CN0582 circuit notes, respectively.

In systems not requiring a response down to DC (0 Hz) such as those using only piezoelectric vibration sensors, the offsetting DAC and surrounding circuity can be eliminated. The signal chain can then be simplified to an AC-coupled inverting amplifier biased to half the ADC's reference voltage (2.5 V), with the FDA circuit left as is.

Circuit Evaluation & Test

This section covers the setup and procedure for evaluating the EVAL-CN0579-ARDZ. For complete setup details and other important information, refer to the CN0579 User Guide.


Required Hardware

  • EVAL-CN0579-ARDZ circuit evaluation board
  • Terasic DE10-Nano FPGA development board
  • Monitor with high-definition multimedia interface (HDMI®) port
  • HDMI to HDMI cable
  • Wireless keyboard and mouse with USB dongle
  • USB on-the-go (OTG) cable (micro USB to USB)
  • Precision AC source (for example, AP2700, Brüel & Kjær, or similar precision sine generator)
  • Coaxial cable with Bayonet Neill–Concelman (BNC) and subminiature version A (SMA) terminations

Required Software


The basic test setup shown in Figure 10 requires the EVALCN0579- ARDZ to be plugged into the supported FGPA carrier board. The carrier board is required to power the EVAL-CN0579- ARDZ, run the embedded Linux image, capture the data, and display the data. Available software supports Terasic DE10-Nano and Digilent Cora Z7-07S FPGA carrier boards.

Figure 10. CN0579 Test Setup

Step by step instructions follow:

  1. Load the Analog Devices FPGA Linux image into the microSD card.
  2. Configure the microSD card to use the correct files for both the EVAL-CN0579-ARDZ and the Terasic DE10-Nano carrier board.
  3. Connect the HDMI cable from the Terasic DE10-Nano to a monitor.
  4. Connect the USB OTG cable to the microUSB port on the Terasic DE10-Nano, and then connect the USB dongle for the wireless mouse/keyboard.
  5. Mount the EVAL-CN0579-ARDZ on the Terasic DE10-Nano carrier board by plugging it into the Arduino headers.
  6. Connect the BNC end of the coaxial cable to the signal source single-ended or unbalanced output, and the other end to one of the channels of the EVAL-CN0579-ARDZ analog input SMA connector.
  7. Using the power supply provided, connect the barrel jack to turn on the Terasic DE10-Nano.
  8. Set the corresponding voltage shift code for the DAC and current source control using the debug panel of the ADI IIO oscilloscope.
  9. Power-on the sine or arbitrary waveform generator using the following settings:
    1. Set the signal type to sine wave.
    2. Set level to 1 V p-p at 1 kHz.
    3. Enable the output.
  10. Run the ADI IIO oscilloscope data capture to visualize the resulting ADC data and FFT data.

The two plots in Figure 11 and Figure 12 show the typical captures that are expected from the carrier card when configured, as described in Step 1 through Step 9. Figure 11 shows the time domain view of the ADC capture data, illustrating the expected amplitude over a number of samples.

Figure 11. Time Domain Data Capture of 1 kHz Input Signal

Figure 12 shows the same data processed and displayed as a frequency domain FFT plot.

Figure 12. FFT Measurement of 1 kHz Input Signal