Features and Benefits
- Gain Bandwidth Product: 500MHz
- –3dB Bandwidth (A = 1): 350MHz
- Low Input Bias Current:
- ±3fA Typ. Room Temperature
- 4pA Max at 125°C
- Current Noise (100kHz): 5.5fA/√Hz
- Voltage Noise (1MHz): 4.3nV/√Hz
- Extremely Low CIN 450fF
- Rail-to-Rail Output
- Slew Rate: 400V/μs
- Supply Range: 3.1V to 5.25V
- Quiescent Current: 16.5mA
- Harmonic Distortion (2VP-P):
- –100dB at 1MHz
- –80dB at 10MHz
- Operating Temp Range: –40°C to 125°C
- Single in 8-Lead SO-8, 6-Lead TSOT-23 Packages
- Dual in 8-Lead MS8, 3mm × 3mm 10-Lead DFN 10 Packages
The LTC6268/LTC6269 is a single/dual 500MHz FET-input operational amplifier with extremely low input bias current and low input capacitance. It also features low input-referred current noise and voltage noise making it an ideal choice for high speed transimpedance amplifiers, CCD output buffers, and high-impedance sensor amplifiers. Its low distortion makes the LTC6268/LTC6269 an ideal amplifier for driving SAR ADCs.
It operates on 3.1V to 5.25V supply and consumes 16.5mA per amplifier. A shutdown feature can be used to lower power consumption when the amplifier is not in use.
The LTC6268 single op amp is available in 8-lead SOIC and 6-lead SOT-23 packages. The SOIC package includes two unconnected pins which can be used to create an input pin guard ring to protect against board leakage currents. The LTC6269 dual op amp is available in 8-lead MSOP with exposed pad and 3mm × 3mm 10-lead DFN packages. They are fully specified over the –40°C to 85°C and the –40°C to 125°C temperature ranges.
- Trans-Impedance Amplifiers
- ADC Drivers
- CCD Output Buffer
- Photomultiplier Tube Post-Amplifier
- Low IBIAS Circuits
Markets and Technologies
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
Demonstration Circuit 2414A has layouts for three channels of SOT-23 transimpedance amplifiers. Each of the three layouts applies different techniques achieving various parasitic feedback capacitances (CF). The upper channel, U3, assumes a low Transimpedance gain, has a parasitic CF of 0.1pF, and provides a footprint for an additional component CF in an 0402 footprint (C29). The lower channel, U1, assumes high transimpedance gain and was laid out to minimize CF, achieving approximately 7fF, although the real situation is more complex. The middle channel, U2, assumes a middle case. The outputs of the circuit are laid out for SMA edge connectors. The inputs consist of six pads per channel along the edge where a through-hole photodiode can be mounted, with provision for any photodiode pinout.
Tools & Simulations
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Technical Articles (5)
Press Releases (1)
Rarely Asked Questions (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.