Overview
Features and Benefits
- 2 Blackfin cores capable of 500 MHz/1000 MMACs (2000 MMACs total) for demanding signal processing applications.
- 424 K bytes of on-chip SRAM composed of 148kB of L1 SRAM per core with parity support and a shared L2 128kB SRAM with ECC support.
- 3x Enhanced Parallel Peripheral Interfaces (ePPIs) supporting up to 24-bit data widths, ITU-R BT.656 modes, and direct connection to TFT LCD panels, parallel converters, video encoders and decoders, image sensors, and other general-purpose peripherals.
- 3 synchronous serial ports (SPORTs) supporting I2S, Packed I2S, left-justified sample pair, and TDM modes.
- USB 2.0 HS OTG.
- Removable Storage Interface (RSI).
- 2 10/100 Ethernet MACs with IEEE 1588 support.
- Controller Area Network (CAN) Interface.
- 4 Link Ports supporting 8-bit wide DMA enabled data transfer.
- 2 Watch Dog Timers and 8 Timer/Counters with PWM support CRC engine.
- 2 SPI-compatible ports supporting master and slave modes.
- 2 UART and 2 Two-Wire Interfaces.
- 2 16-bit Pulse Width Modulation (PWM) channels.
- 19×19 mm CSP BGA package.
- Commercial, and Industrial temperature ranges available.
Product Details
The dual-core ADSP-BF606 Blackfin processor is optimized for a broad range of industrial, instrumentation, medical, and consumer applications demanding complex control and signal processing tasks while maintaining extremely high data throughput.
Features include a high performance enhanced infrastructure, large on-chip memory and a feature rich peripheral set with expanded connectivity options including USB 2.0 HS OTG, 2 10/100 Ethernet MACs, and Removable Storage Interface (RSI).
In addition to these the ADSP-BF606 processor contains features for safety-critical applications, including a CRC for memory protection, Parity and ECC protection in the internal memory blocks and a Fault Management Unit.
Product Categories
Markets and Technologies
EDN China Innovation Award Winner 2012
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (2)
Documentation & Resources
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EE-378: Processor Comparison Guide (ADSP-BF60x/BF70x vs ADSP-SC58x/2158x) (Rev. 1)1/19/2016PDF554 K
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EE-360: Utilizing the Trigger Routing Unit for System Level Synchronization (Rev. 1)2/14/2015PDF211 kB
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• EE-360: Code Example
ZIP -
EE-364: Implementing Second-Stage Loaders for ADSP-BF60x Blackfin® Processors (Rev. 1)11/18/2014PDF480 K
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• EE-364: Code Example
ZIP -
EE-362: ADSP-BF60x Blackfin® Processors System Optimization Techniques (Rev. 1)11/13/2013PDF747 kB
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• EE-362: Code Example
ZIP -
EE-358: Interfacing Red/Clear Sensors to ADSP-BF609® Blackfin Processors (Rev. 1)5/27/2013PDF319 kB
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EE-354: UART Enhancements on ADSP-BF60x Blackfin® Processors (Rev. 1)8/20/2012PDF109 kB
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EE-335: Interfacing SD Cards with Blackfin Processors (Rev. 1)3/4/2010PDF2666 kB
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• EE-335: Code Example
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EE-339: Using External Switching Regulators with Blackfin® Processors (Rev. 1)8/18/2009PDF163 kB
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EE-326: Blackfin® Processor and SDRAM Technology (Rev. 2)8/18/2009PDF958 kB
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• EE-326: Code example
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EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev. 2)7/7/2008PDF77 kB
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EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev. 4)8/28/2007PDF119 kB
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• EE-185: Associated Code (Rev 4, 08/2007)
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EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev. 14)5/21/2007PDF183 kB
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• EE-175: Associated Files
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EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev. 1)6/7/2005PDF447 kB
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EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005PDF90 kB
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EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev. 5)10/30/2003PDF231 kB
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• EE-183 Software Code
ZIP
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Probing EI3 Extender Board Manual (Rev. 1.0)9/11/2012PDF516 kB
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Video Decoder EI3 Extender Board Manual (Rev. 1.1)6/7/2012PDF578 kB
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Video Encoder EI3 Extender Board Manual (Rev. 1.1)5/30/2012PDF529 kB
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Blackfin®/SHARC® USB EZ-Extender® Manual (Rev. 1.1)5/7/2009PDF359 kB
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ADSP-BF60x Blackfin® Processor Hardware Reference (Rev. 0.5)6/4/2012PDF16397 kB
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Documentation Errata
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ADSP-BF5xx/ADSP-BF60x Blackfin® Processor Programming Reference (Rev. 2.2)7/18/2006PDF20321 kB
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Documentation Errata
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ICE-1000/ICE-2000 Emulator User’s Guide (Rev. 1.2)6/3/2014PDF321 kB
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HPUSB, USB, and HPPCI Emulator User’s Guide (Rev. 3.2)11/11/2009PDF746 kB
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ICE-100B Emulator User’s Guide (Rev. 1.1)11/11/2009PDF348 kB
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ADSP-BF606/BF607/BF608/BF609 Blackfin Anomaly List (Rev. I, 8/4/2017)8/24/2017PDF224K
Software & Systems Requirements
Middleware
Lightweight TCP/IP (lwIP) Stack
Software Development Tools
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
Tools & Simulations
BSDL Model Files
IBIS Models
Design Tools
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
Sample & Buy
Ordering FAQs
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.