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ADSP-21477/ADSP-21478/ADSP-21479 SHARC Processor Data Sheet (Rev. D)3/31/2010PDF1 M
Overview
Features and Benefits
- 266 MHz core clock speed
- 3 Mbits of on-chip RAM
- FIR, IIR, and FFT accelerators
- 16-bit wide SDR SDRAM external memory interface
- Digital Applications Interface (DAI) enabling user-definable access to peripherals including an S/P DIF Tx/Rx, and 8-channel asynchronous sample rate converter
- Fully enhanced DMA engine including scatter/gather DMA, delay line DMA
- 8 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes
- Real-Time Clock (RTC)
- Watch Dog Timer
- Shift Registers
- 2 SPI-compatible ports supporting master and slave modes
- UART and Two-Wire Interface
- 16 Pulse Width Modulation (PWM) channels
- 3 full-featured timers
- 196 ball CSP_BGA and 100 ld LQFP EPAD packages
- Commercial, Industrial, and automotive temperature ranges
Product Details
The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.
The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.
Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).
Product Categories
Markets and Technologies
NOT FOR USE IN IN-VIVO APPLICATIONS FOR BODY FLUID CONSTITUENT MONITORING, INCLUDING MONITORING ONE OR MORE OF THE COMPONENTS THAT FORM OR MAY BE A PART OF, OR CONTAMINATE HUMAN BLOOD OR OTHER BODY FLUIDS, SUCH AS, BUT NOT LIMITED TO CARBOXYHEMOGLOBIN, METHEMOGLOBIN TOTAL HEMOGLOBIN, OXYGEN SATURATION, OXYGEN CONTENT, FRACTIONAL ARTERIAL OXYGEN SATURATION, BILIRUBIN, GLUCOSE, DRUGS, LIPIDS, WATER, PROTEIN, AND PH.
Contact your ADI sales representative for more information. If you need to find a Sales Rep in your area, please visit the Sales & Distributor Map/Listing.
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (3)
Documentation & Resources
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EE-379: ADSP-214xx vs ADSP-SC58x/ADSP-2158x - Peripheral Considerations (Rev. 1)11/27/2017PDF387 K
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EE-356: Emulator and Evaluation Hardware Troubleshooting Guide for CCES Users (Rev. 2)2/14/2015PDF779 K
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• EE-356: Associated Files
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EE-355: Expert In-Circuit FLASH Programmer for SHARC® Processors (Rev. 1)8/20/2012PDF1045 kB
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• EE-355: Code Example (Rev 1, 08/2012)
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EE-243: Using the Expert DAI for SHARC® Processors (Rev. 7)7/6/2010PDF337 kB
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• EE-243: Code example (Rev 7, 06/2010)
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EE-348: Estimating Power for ADSP-214xx SHARC®Processors (Rev. 4)4/6/2010PDF135 kB
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• EE-348: Power Calculator (Rev 4, 02/2011)
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EE-332: Cycle Counting and Profiling (Rev. 2)8/18/2009PDF142 kB
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• EE-332: Code example
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EE-322: Expert Code Generator for SHARC® Processors (Rev. 5)6/15/2009PDF742 kB
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• EE-322: Code Example (Rev 5, 01/2012)
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EE-340: Connecting SHARC® and Blackfin® Processors over SPI (Rev. 1)5/8/2009PDF209 kB
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• EE-340: Code example
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EE-323: Implementing Dynamically Loaded Software Modules (Rev. 1)3/8/2008PDF0
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• EE-323: Associated Code
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EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev. 14)5/21/2007PDF183 kB
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• EE-175: Associated Files
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EE-253: Power Bypass Decoupling of SHARC® Processors (Rev. 1)12/5/2006PDF354 kB
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EE-290: Managing the Core PLL on SHARC® Processors (Rev. 5)7/12/2006PDF409 kB
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• EE-290: Code Example (Rev 5, 03/2012)
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EE-286: Interfacing SDRAM Memories to SHARC® Processors (Rev. 5)12/1/2005PDF1701 kB
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• EE-286: Code Example (Rev 5, 11/2010)
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EE-270: Extended-Precision Fixed-Point Arithmetic on SIMD SHARC® Processors (Rev. 1)7/8/2005PDF86 kB
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• EE-270 Software Code
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EE-264: Interfacing MultiMediaCard™ with ADSP-2126x SHARC® Processors (Rev. 1)5/6/2005PDF975 kB
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• EE-264 Software Code
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EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev. 1)4/4/2005PDF32 kB
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• EE-267 Software Code
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EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005PDF90 kB
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EE-260: Interfacing AD7865 Parallel ADCs to ADSP-2136x SHARC® Processors (Rev. 1)12/17/2004PDF500 kB
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• EE-260 Software Code
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EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev. 3)9/15/2004PDF1186 kB
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• EE-202 Software Code
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EE-232: Configuring the Signal Routing Unit of ADSP-2126x SHARC® DSPs (Rev. 1)2/18/2004PDF70 kB
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EE-210: SDRAM Selection and Configuration Guidelines for ADI Processors (Rev. 2)10/27/2003PDF241 kB
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EE-189: Link Port Tips & Tricks For ADSP-2106x & ADSP-2116x SHARC® DSPs10/27/2003PDF105 kB
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EE-177: SHARC® SPI Slave Booting (Rev. 3)5/2/2003PDF43 kB
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• EE-177: Code Example (Rev 3, 01/2007)
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EE-68: Analog Devices JTAG Emulation Technical Reference (Rev. 10)12/20/2002PDF293 kB
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EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev. 2)9/17/2002PDF88 kB
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• EE-69: Code Example (Rev 2, 01/2007)
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EE-104: Setting Up Streams with the VisualDSP Debugger11/5/1999PDF120 kB
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• EE-104 Software Code
ZIP
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ADSP-21479 EZ-KIT Lite® Evaluation System Manual (Rev. 1.1)4/4/2010PDF678 kB
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SHARC® Audio EZ-Extender® Manual (Rev. 1.1)11/11/2009PDF617 kB
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Blackfin®/SHARC® USB EZ-Extender® Manual (Rev. 1.1)5/7/2009PDF359 kB
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SHARC® USB EZ-Extender® Manual (Rev. 2.1)7/26/2006PDF222 kB
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SHARC® EZ-Extender® Manual (Rev. 3.1)7/26/2006PDF235 kB
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SHARC Processors: Manuals9/10/2015
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Getting Started with SHARC2/14/2015
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ADSP-214xx SHARC® Processor Hardware Reference (Rev. 1.1)8/17/2009PDF17731 kB
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Documentation Errata
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VisualDSP++® 5.0 Assembler and Preprocessor Manual (Rev. 3.4)11/15/2009PDF3197 kB
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VisualDSP++® 5.0 C/C++ Compiler Manual for SHARC® Processors (Rev. 1.5)11/13/2009PDF2277 kB
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Documentation Errata
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VisualDSP++® 5.0 Loader and Utilities Manual (Rev. 2.5)11/13/2009PDF2246 kB
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Documentation Errata
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VisualDSP++® 5.0 Licensing Guide (Rev. 1.4)11/13/2009PDF392 kB
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VisualDSP++® 5.0 Kernel (VDK) Users Guide (Rev. 3.5)11/13/2009PDF2401 kB
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VisualDSP++® 5.0 Linker and Utilities Manual (Rev. 3.5)11/13/2009PDF2290 kB
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VisualDSP++® 5.0 Run-Time Library Manual for SHARC® Processors (Rev. 1.5)11/12/2009PDF2298 kB
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VisualDSP++® 5.0 Users Guide (Rev. 3.0)12/9/2007PDF2738 kB
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VisualDSP++® 5.0 Quick Installation Reference Card (Rev. 3.1)8/30/2007PDF91 kB
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VisualDSP++® 5.0 Getting Started Guide (Rev. 3.0)8/30/2007PDF2035 kB
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Documentation Errata
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VisualDSP++® 5.0 Product Release Bulletin (Rev. 3.0)8/30/2007PDF774 kB
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ICE-1000/ICE-2000 Emulator User’s Guide (Rev. 1.2)6/3/2014PDF321 kB
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HPUSB, USB, and HPPCI Emulator User’s Guide (Rev. 3.2)11/11/2009PDF746 kB
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ICE-100B Emulator User’s Guide (Rev. 1.1)11/11/2009PDF348 kB
Software & Systems Requirements
Software & Tools Anomalies
Software Development Tools
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
SigmaStudio®
Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.
Tools & Simulations
Design Tools
BSDL Model Files
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| ADSP-21478BBCZ-2A | Material Declaration | Reliability Data | 196-Ball CSPBGA (12mm x 12mm x 1.41mm) | |
| ADSP-21478BCPZ-1A | Material Declaration | Reliability Data | 88-Lead LFCSP (12mm x 12mm w/ EP) | |
| ADSP-21478BSWZ-2A | Material Declaration | Reliability Data | 100-Lead LQFP (14mm x 14mm w/ heatsink) | |
| ADSP-21478KBCZ-1A | Material Declaration | Reliability Data | 196-Ball CSPBGA (12mm x 12mm x 1.41mm) | |
| ADSP-21478KBCZ-2A | Material Declaration | Reliability Data | 196-Ball CSPBGA (12mm x 12mm x 1.41mm) | |
| ADSP-21478KBCZ-3A | Material Declaration | Reliability Data | 196-Ball CSPBGA (12mm x 12mm x 1.41mm) | |
| ADSP-21478KCPZ-1A | Material Declaration | Reliability Data | 88-Lead LFCSP (12mm x 12mm w/ EP) | |
| ADSP-21478KSWZ-1A | Material Declaration | Reliability Data | 100-Lead LQFP (14mm x 14mm w/ heatsink) | |
| ADSP-21478KSWZ-2A | Material Declaration | Reliability Data | 100-Lead LQFP (14mm x 14mm w/ heatsink) | |
| Wafer Fabrication Data |
PCN-PDN Information
Select a model from the dropdown below to subscribe to PCN/PDN notifications and view past notifications as well.
Support & Discussions
ADSP-21478 Discussions
Sample & Buy
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.