ADSP-21161N

NOT RECOMMENDED FOR NEW DESIGNS

Low Cost 32-Bit SHARC DSP, 100 MHz

Data Sheet (Rev. C) Product Selection Table
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Overview

  • 100 MHz (10 ns) SIMD SHARC DSP core
  • 600 MFLOPS (32-bit floating-point data), 600 MOPS (32-bit fixed-point data)
  • Code-compatible with all SHARC DSPs
  • Supports IEEE-compatible 32-bit floating-point, 40-bit floating-point and 32-bit fixed-point math
  • Single-cycle instruction execution, including SIMD operations in both computational units
  • One Mbit on-chip dual-ported SRAM
  • 2.4 Gbyte/sec on-chip data bandwidth
  • 14 zero-overhead DMA channels
  • Four synchronous serial ports with I2S support
  • Serial ports support 128 channels TDM frames with selection of companding on a per channel basis
  • Integrated support for SDRAM and SBSRAM external memories
  • Support for single-cycle, 100 MHz instruction execution from x48-bit wide external memories

The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond.

"This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip," said Will Strauss, president of Forward Concepts. "Analog Devices will certainly maintain customer loyalty with this road map."

The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications.

State-of-the-Art Development Tools

The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators.

SHARC DSP Roadmap

There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies.

Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points.

 
ADSP-21161N
Low Cost 32-Bit SHARC DSP, 100 MHz
ADSP-21161N Functional Block Diagram
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Documentation

Data Sheet 1

User Guide 1

Application Note 42

Processor Manual 3

Product Highlight 2

Integrated Circuit Anomaly 1

Legacy Emulator Manual 2

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Software Resources

Software & Tools Anomaly 1

Tools & Simulations

SHARC Processors Software and Tools

Open Tool

BSDL Model File 1

Designing with BGA

Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages

Open Tool

IBIS Model 2

Evaluation Kits

eval board
schematic 1
EMULATOR-USB & HP USB ICE

USB-Based Emulator and High Performance USB-Based Emulator

Buy Now View Details

Features and Benefits

  • Full speed USB 1.1 interface enabling download speeds of up to 150 KB/Sec (ADZS-USB-ICE) or High speed USB 2.0 interface enabling download speeds of up to 1.5MB/sec (ADZS-HPUSB-ICE)
  • Background Telemetry Channel (BTC) support enabling non-intrusive data exchange at up to 2.0 MB/sec (ADZS-HPUSB-ICE only)
  • 1.8V, 2.5V, and 3.3V compliant and tolerant
  • Support for all ADI JTAG processors and DSPs
  • 5V tolerant and 3.3V compliant for 5V processors and DSPs
  • Multiprocessor support
  • 14-pin JTAG connector
  • 3-meter USB cable for difficult-to-reach targets
  • CE-certified

Product Details

Analog Devices’ cost-effective Universal Serial Bus (USB)-based emulator and High performance (HP) Universal Serial Bus (USB)-based emulator each provide an easy, portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors and DSPs. These powerful USB-based emulators perform a wide range of emulation functions, including single-step and full speed execution with pre-defined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the USB and HP USB emulators enable users to communicate with all of the Analog Devices JTAG processors and DSPs using either a full speed USB 1.1 or high speed USB 2.0 port on the host PC. Applications and data can easily and rapidly be tested and transferred between the emulators and the separately available VisualDSP++ development and debugging environment(sold separately).

The plug-and-play architecture of USB allows the emulators to be automatically detected and configured by the host operating system. It can also be connected to and disconnected from the host without opening the PC or turning off the power to the PC. A 3-meter cable is included to connect the emulators to the host PC, thus providing abundant accessibility to hard to reach targets.

The HP USB-based emulator also supports the Background Telemetry Channel (BTC), a non-intrusive method for exchanging data between the host and target application without affecting the target system's real-time characteristics.

Part Number:
USB-Based Emulator
Part Number: ADZS-USB-ICE
High Performance USB-Based Emulator
Part Number: ADZS-HPUSB-ICE

Tools Support:
Tel: 1-800-ANALOGD (262-5643)
Contact Support

For additional information, contact your local Analog Devices Sales Office or Distributor.
EMULATOR-USB & HP USB ICE
USB-Based Emulator and High Performance USB-Based Emulator
Emulator-USB & HP USB ICE

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