Features and Benefits
- Ultralow power, high performance transceiver
- Frequency bands: 902 MHz to
- Data rates supported: 1 kbps to
- Flexible firmware programmable system controller and packet processor
- 2.2 V to 3.6 V power supply
- Single-ended and differential power amplifiers (PAs)
- Low IF receiver with programmable IF bandwidths
- Receiver sensitivity (BER)
- Very low power consumption
- RF output power of −20 dBm to
+13.5 dBm (single-ended PA)
- RF output power of −20 dBm to
+10 dBm (differential PA)
- Patented fast settling automatic frequency control (AFC)
- See data sheet for additional information
The ADF7023-J is a very low power, high performance, highly integrated 2FSK/GFSK/MSK/GMSK transceiver designed for operation in the 902 MHz to 958 MHz frequency band, which covers the ARIB Standard T96 band at 950 MHz. Data rates from 1 kbps to 300 kbps are supported.
The transmit RF synthesizer contains a VCO and a low noise fractional-N phase locked loop (PLL) with an output channel frequency resolution of 400 Hz. The VCO operates at twice the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from −20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allow for Tx antenna diversity.
The receiver is exceptionally linear, achieving an IP3 specification of −12.2 dBm and −11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at a ±2 MHz offset and 74 dB at a ±10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, AFC loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet. A patent pending image rejection calibration scheme is available by downloading the image rejection calibration firmware module to program RAM. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.
See data sheet for additional information.
- Smart metering
- IEEE 802.15.4g
- Home automation
- Process and building control
- Home Energy Management Systems (HEMS)
- Wireless sensor networks (WSNs)
- Wireless healthcare
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
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Software & Systems Requirements
ADF7023 Evaluation Board Software
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Analog Devices ADIsimSRD Design Studio is a very powerful tool allowing real-time simulation and optimization of many of the parameters in a typical wireless system using the ADF7xxx family of transceivers and transmitters.
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