AD9540
Low Jitter, DDS-based Clock Generator and Synthesizer
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Overview
Features and Benefits
- Excellent intrinsic jitter performance
- 200 MHz phase frequency detector inputs
- 655 MHz programmable input dividers for the phase frequency detector (÷M, ÷N) {M, N = 1 to 16} (bypassable)
- Programmable RF divider (÷R) {R = 1, 2, 4, 8} (bypassable)
- 8 programmable phase/frequency profiles
- 400 MSPS internal DDS clock speed
- 48-bit frequency tuning word resolution
- 14-bit programmable phase offset
- 1.8 V supply for device operation
- 3.3 V supply for I/O, CML driver, and charge pump output
- Software controlled power-down
- 48-lead LFCSP package
- Programmable charge pump current (up to 4 mA)
- Dual-mode PLL lock detect
- 655 MHz CML-mode PECL-compliant output driver
Product Details
The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 200 MHz phase frequency detector and a digitally controlled charge pump current. The device also provides a low jitter, 655 MHz CML-mode, PECL-compliant output driver with programmable slew rates. External VCO rates up to 2.7 GHz are supported.
Extremely fine tuning resolution (steps less than 2.33 µHz) is another feature supported by this device. Information is loaded into the AD9540 via a serial I/O port that has a device write speed of 25 Mbps. The AD9540 frequency divider block can also be programmed to support a spread spectrum mode of operation.
The AD9540 is specified to operate over the extended automotive range of −40°C to +85°C.
Applications
- Clocking high performance data converters
- Base station clocking applications
- Network (SONET/SDH) clocking
- Gigabit Ethernet (GbE) clocking
- Instrumentation clocking circuits
- Agile LO frequency synthesis
- Automotive radar
- FM chirp source for radar and scanning systems
- Test and measurement equipment
- Acousto-optic device drivers
Product Categories
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
Documentation & Resources
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AN-1389: Recommended Rework Procedure for the Lead Frame Chip Scale Package (LFCSP) (Rev. 0)1/25/2016
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AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)2/14/2015
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AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)2/14/2015
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AN-769: Generating Multiple Clock Outputs from the AD9540 (Rev. 0)2/14/2015
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AN-939: Super-Nyquist Operation of the AD9912 Yields a High RF Output Signal (Rev. 0)2/14/2015
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AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance (Rev. 0)2/14/2015
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AN-557: An Experimenter's Project: (Rev. 0)2/14/2015
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AN-419: A Discrete, Low Phase Noise, 125 MHz Crystal Oscillator for the AD98502/14/2015
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AN-237: Choosing DACs for Direct Digital Synthesis2/14/2015
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AN-423: Amplitude Modulation of the AD9850 Direct Digital Synthesizer2/14/2015
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AN-345: Grounding for Low-and-High-Frequency Circuits2/14/2015
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AN-342: Analog Signal-Handling for High Speed and Accuracy2/14/2015
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AN-823: Direct Digital Synthesizers in Clocking Applications Time (Rev. 0)2/14/2015
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AN-280: Mixed Signal Circuit Technologies2/14/2015
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AN-605: Synchronizing Multiple AD9852 DDS-Based Synthesizers (Rev. 0)2/14/2015
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AN-927: Determining if a Spur is Related to the DDS/DAC or to Some Other Source (For Example, Switching Supplies) (Rev. 0)2/14/2015
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AN-587: Synchronizing Multiple AD9850/AD9851 DDS-Based Synthesizers (Rev. 0)2/14/2015
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AN-953: Direct Digital Synthesis (DDS) with a Programmable Modulus (Rev. B)3/27/2008
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AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers (Rev. 0)12/6/2006
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AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0)7/26/2006
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AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP)2/1/2006
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AN-741: Little Known Characteristics of Phase Noise (Rev. 0)11/29/2004
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AN-632: Provisionary Data Rates Using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous-Rate CDR (Rev. 0)9/25/2003
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AN-543: High Quality, All-Digital RF Frequency Modulation Generation with the ADSP-2181 and the AD9850 DDS9/12/2002
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• AN-543 - Monaural FM Transmitter
DSP -
• AN-543 - Stereo FM Transmitter
DSP
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FAQs7/26/2017
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Low-power direct digital synthesizer cores enable high level of integration2/20/2008
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Video Portables and Cameras Get HDMI Outputs4/13/2007
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Improved DDS Devices Enable Advanced Comm Systems9/1/2006
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ADI Buys Korean Mobile TV Chip Maker6/7/2006
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Design A Clock-Distribution Strategy With Confidence4/27/2006
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The Year of the Waveform Generator12/1/2005
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DDS Applications9/26/2005
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Synchronized Synthesizers Aid Multichannel Systems9/20/2005
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DDS IC Initiates Synchronized Signals7/20/2005
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Digital Waveform Generator Provides Flexible Frequency Tuning for Sensor Measurement12/7/2004
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Understand the Effects of Clock Jitter and Phase Noise on Sampled Systems12/7/2004
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DDS Simplifies Polar Modulation8/5/2004
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DDS Design5/13/2004
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Integrated DDS Chip Takes Steps To 2.7 GHz4/28/2004
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Speedy A/Ds Demand Stable Clocks3/22/2004
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DDS IC Plus Frequency-To-Voltage Converter Make Low-Cost DAC2/5/2004
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Simple Circuit Controls Stepper Motors1/8/2004
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Two DDS ICs Implement Amplitude-shift Keying12/25/2003
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DDS Circuit Generates Precise PWM Waveforms10/2/2003
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DDS Device Produces Sawtooth Waveform7/10/2003
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400-MSample DDSs Run On Only +1.8 VDC12/1/2002
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Digital Potentiometers Vary Amplitude In DDS Devices5/29/2000
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DDS Device Provides Amplitude Modulation9/2/1999
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Basics of Designing a Digital Radio Receiver (Radio 101)3/6/1998
Tools & Simulations
Design Tools
ADIsimCLK Design and Evaluation Software
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Product Recommendations
AD9540 Companion Parts
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| AD9540BCPZ | Material Declaration | Reliability Data | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | |
| AD9540BCPZ-REEL7 | Material Declaration | Reliability Data | 48-Lead LFCSP (7mm x 7mm x 0.85mm w/ EP) | |
| Wafer Fabrication Data |
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AD9540 Discussions
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