AD9517-4
Info : RECOMMENDED FOR NEW DESIGNS
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AD9517-4

12-Output Clock Generator with Integrated 1.6 GHz VCO

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 4
1ku List Price Starting From $8.60
Features
  • Low phase noise, phase-locked loop
    On-chip VCO tunes from 1.45 GHz to 1.80 GHz
  • External VCO/VCXO to 2.4 GHz optional
  • 1 differential or 2 single-ended reference inputs
  • Reference monitoring capability
  • 2 pairs of 1.6 GHz LVPECL outputs
    Each output pair shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms
    Channel-to-channel skew paired outputs of <10 ps
  • 2 pairs of 800 MHz LVDS clock outputs
    Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
    Additive output jitter: 275 fs rms
    Fine delay adjust (Δt) on each LVDS output
  • Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
  • Automatic synchronization of all outputs on power-up
  • See datasheet for additional features
Additional Details
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The AD9517-4 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.

The AD9517-4 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.

The AD9517-4 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.

For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs.

Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.

The AD9517-4 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).

The AD9517-4 is specified for operation over the industrial range of −40°C to +85°C.

APPLICATIONS

  • Low jitter, low phase noise clock distribution
  • 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
  • Forward error correction (G.710)
  • Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
  • High performance wireless transceivers
  • ATE and high performance instrumentation
Part Models 4
1ku List Price Starting From $8.60

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD9517-4ABCPZ
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AD9517-4ABCPZ-RL7
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AD9517-4BCPZ
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AD9517-4BCPZ-REEL7
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Product Lifecycle

PCN

Sep 13, 2017

- 16_0077

CANCELLED: Conversion of Select 4x4, 5x5, 6x6 and 7x7mm LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE Korea.

Aug 21, 2009

- 09_0156

Moisture Sensitivity Level (MSL) change for select devices packaged in 7x7mm, 8x8mm, and 9x9mm LFCSP packages. Introduction of new models on all affected devices indicated by a revision letter in the model part number.

Mar 12, 2010

- 10_0031

Discontinuation and replacement of select models of generics as listed herein.

AD9517-4BCPZ

Obsolete

AD9517-4BCPZ-REEL7

Obsolete

Filter by Model

reset

Reset Filters

Part Models

Product Lifecycle

PCN

Sep 13, 2017

- 16_0077

arrow down

CANCELLED: Conversion of Select 4x4, 5x5, 6x6 and 7x7mm LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE Korea.

Aug 21, 2009

- 09_0156

arrow down

Moisture Sensitivity Level (MSL) change for select devices packaged in 7x7mm, 8x8mm, and 9x9mm LFCSP packages. Introduction of new models on all affected devices indicated by a revision letter in the model part number.

Mar 12, 2010

- 10_0031

arrow down

Discontinuation and replacement of select models of generics as listed herein.

AD9517-4BCPZ

Obsolete

AD9517-4BCPZ-REEL7

Obsolete

Software & Part Ecosystem

Software & Part Ecosystem

Evaluation Kit

Evaluation Kits 2

EVAL-AD9517-4

AD9517- 4 Evaluation Board

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EVAL-AD9517-4

AD9517- 4 Evaluation Board

AD9517- 4 Evaluation Board

Features and Benefits

  • Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
  • LDOs are easily bypassed for power measurements
  • 8 ac-coupled differential LVPECL SMA connectors
  • 2 ac-coupled LVPECL differential headers
  • 2 dc-coupled differential LVDS SMA connectors that are reconfigurable to four CMOS SMA connectors
  • 2 dc-coupled LVDS differential headers that are reconfigurable to four CMOS connectors
  • SMA connectors for
    2 reference inputs
    Charge pump output
    Clock distribution input
  • USB connection to PC
  • Microsoft Windows-based evaluation software with simple graphical user interface
  • On-board PLL loop filter
  • Easy access to digital I/O and diagnostic signals via I/O header
  • Status LEDs for diagnostic signals

Product Detail

The AD9516-x, AD9517-x, and AD9518-x are very low noise PLL clock synthesizers featuring an integrated VCO, clock dividers, and up to 14 outputs. The AD9516 features automatic holdover and a flexible reference input circuit allowing for very smooth reference clock switching. The AD9516 family also features the necessary provisions for an external VCXO.

The AD9516 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9516. The AD9516, AD9517, and AD9518 differ only in package size, and the number of outputs. The evaluation software main window for the AD9517 and AD9518 reflects fewer outputs, but the operation is identical for all devices.

Use the user guide in conjunction with the AD9516, AD9517, and AD9518 data sheets.

reference details image

AD-FMCOMMS6-EBZ

AD-FMCOMMS6-EBZ Evaluation Board

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AD-FMCOMMS6-EBZ

AD-FMCOMMS6-EBZ Evaluation Board

AD-FMCOMMS6-EBZ Evaluation Board

Features and Benefits

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption 
  • Avoids image rejection issues and unwanted mixing 

Product Detail

The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.

This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
  • Avoids image rejection issues and unwanted mixing


This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.


Tools & Simulations

Tools & Simulations 2

Reference Designs

Reference Designs 1

Broadband Dual Channel IF Sampling Receiver

High Performance, Dual Channel IF Sampling Receiver

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