Features and Benefits
- 4 ADCs integrated into 1 package
- 119 mW ADC power per channel at 65 MSPS
- SNR = 70 dB (to Nyquist)
- ENOB = 11.3 bits
- SFDR = 82 dBc (to Nyquist)
- Excellent linearity
- DNL = ±0.3 LSB (typical)
- INL = ±0.4 LSB (typical)
- Serial LVDS (ANSI-644, default)
- Low power, reduced signal option (similar to IEEE 1596.3)
- Data and frame clock outputs
- 315 MHz full-power analog bandwidth
- 2 V p-p input voltage range
- 1.8 V supply operation
- Serial port control
- Full chip and individual channel power-down modes Flexible bit orientation
- Built in and custom digital test pattern generation
- Programmable clock and data alignment Programmable output resolution
- Standby mode
The AD9228 is a quad, 12-bit, 40/65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes <2 mW when all channels are disabled.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9228 is available in an RoHS compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.
- Small Footprint. Four ADCs are contained in a small, space-saving package.
- Low power of 119 mW/channel at 65 MSPS.
- Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 390 MHz and supports double data rate (DDR) operation.
- User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements.
- Pin-Compatible Family. This includes the AD9287 (8-bit), AD9219 (10-bit), and AD9259 (14-bit).
- Medical imaging and nondestructive ultrasound
- Portable ultrasound and digital beam-forming systems
- Quadrature radio receivers
- Diversity radio receivers
- Tape drives
- Optical networking
- Test equipment
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (2)
The AD9228-65KITZ is an evaluation with interposer board for the AD9228, quad, 12-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations, It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9228.
The AD9228 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email firstname.lastname@example.org.
The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.
Features & Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Documentation & Resources
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual8/18/2020
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)5/12/2015
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)2/14/2015
AN-282: Fundamentals of Sampled Data Systems2/14/2015
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)2/14/2015
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)2/14/2015
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)2/14/2015
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. C)2/14/2015
AN-345: Grounding for Low-and-High-Frequency Circuits2/14/2015
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)2/14/2015
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012
AN-737: How ADIsimADC Models an ADC (Rev. B)11/9/2007
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)9/20/2006
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)12/14/2004
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)11/29/2004
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
AD9228 IBIS Model
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.