AD9212
Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC
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Features
- 8 analog-to-digital converters (ADCs) integrated into 1 package
- 100 mW ADC power per channel at 65 MSPS
- SNR = 60.8 dB (to Nyquist)
- ENOB = 9.8 bits
- SFDR = 80 dBc (to Nyquist)
- Excellent linearity
- DNL = ±0.3 LSB (typical); INL = ±0.4 LSB (typical) - Serial LVDS (ANSI-644, default)
- Low power, reduced signal option (similar to IEEE 1596.3)
- Data and frame clock outputs
- 325 MHz, full-power analog bandwidth
- 2 V p-p input voltage range
- 1.8 V supply operation
- Please See the Data Sheet for Additional Information
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The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. Operating at a conversion rate of up to 65 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock (DCO) for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user- defined test patterns entered via the serial port interface (SPI).
The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.
PRODUCT HIGHLIGHTS
- Small Footprint. Eight ADCs are contained in a small package.
- Low Power of 100 mW per Channel at 65 MSPS.
- Ease of Use. A data clock output (DCO) operates up to 300 MHz and supports double data rate (DDR) operation.
- User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements.
- Pin-Compatible Family. This includes the AD9222 (12-bit) and AD9252 (14-bit).
APPLICATIONS
- Medical imaging and nondestructive ultrasound
- Portable ultrasound and digital beam-forming systems
- Quadrature radio receivers
- Diversity radio receivers
- Tape drives
- Optical networking
- Test equipment
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Visit the ADI Support Page
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AD9212
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Documentation
Data Sheet 1
Application Note 14
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev.0)
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev.0)
AN-345: Grounding for Low-and-High-Frequency Circuits
AN-282: Fundamentals of Sampled Data Systems
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev.0)
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev.0)
AN-737: How ADIsimADC Models an ADC (Rev.B)
AN-741: Little Known Characteristics of Phase Noise (Rev.0)
AN-501: Aperture Uncertainty and ADC System Performance (Rev.A)
AN-742: Frequency Domain Response of Switched Capacitor ADCs
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual
AN-935: Designing an ADC Transformer-Coupled Front End
AN-1142: Techniques for High Speed ADC PCB Layout
AN-835: Understanding High Speed ADC Testing and Evaluation
Evaluation Design File 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9212ABCPZ-40 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9212ABCPZ-65 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9212ABCPZRL7-40 |
64-Lead LFCSP (9mm x 9mm w/ EP)
|
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| AD9212ABCPZRL7-65 |
64-Lead LFCSP (9mm x 9mm w/ EP)
|
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- AD9212ABCPZ-40
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9212ABCPZ-65
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9212ABCPZRL7-40
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9212ABCPZRL7-65
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
Feb 1, 2024
- 24_0009
Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process
AD9212ABCPZ-40
PRODUCTION
AD9212ABCPZ-65
PRODUCTION
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9212ABCPZ-40
PRODUCTION
AD9212ABCPZ-65
PRODUCTION
Jan 29, 2014
- 14_0014
ADI Corporate Obsolescence Notice-January 2014 (Standard Products)
AD9212ABCPZRL7-40
Obsolete
AD9212ABCPZRL7-65
Obsolete
Filter by Model
Part Models
Product Lifecycle
PCN
Feb 1, 2024
- 24_0009
Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process
AD9212ABCPZ-40
PRODUCTION
AD9212ABCPZ-65
PRODUCTION
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9212ABCPZ-40
PRODUCTION
AD9212ABCPZ-65
PRODUCTION
Jan 29, 2014
- 14_0014
ADI Corporate Obsolescence Notice-January 2014 (Standard Products)
Evaluation Kits 2
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
Features and Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Product Detail
Resources
Software
ZIP
29.79 M
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EVAL-AD9212
AD9212 Evaluation Board
Product Detail
Resources
Tools & Simulations 2
IBIS Model 1
IBIS Model
Visual Analog
