Features and Benefits
- 8 analog-to-digital converters (ADCs) integrated into 1 package
- 100 mW ADC power per channel at 65 MSPS
- SNR = 60.8 dB (to Nyquist)
- ENOB = 9.8 bits
- SFDR = 80 dBc (to Nyquist)
- Excellent linearity
- DNL = ±0.3 LSB (typical); INL = ±0.4 LSB (typical)
- Serial LVDS (ANSI-644, default)
- Low power, reduced signal option (similar to IEEE 1596.3)
- Data and frame clock outputs
- 325 MHz, full-power analog bandwidth
- 2 V p-p input voltage range
- 1.8 V supply operation
- Please See the Data Sheet for Additional Information
The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. Operating at a conversion rate of up to 65 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock (DCO) for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.
ThThe ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user- defined test patterns entered via the serial port interface (SPI).
The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.
- Small Footprint. Eight ADCs are contained in a small package.
- Low Power of 100 mW per Channel at 65 MSPS.
- Ease of Use. A data clock output (DCO) operates up to 300 MHz and supports double data rate (DDR) operation.
- User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements.
- Pin-Compatible Family. This includes the AD9222 (12-bit) and AD9252 (14-bit).
- Medical imaging and nondestructive ultrasound
- Portable ultrasound and digital beam-forming systems
- Quadrature radio receivers
- Diversity radio receivers
- Tape drives
- Optical networking
- Test equipment
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Application Notes (14)
Tools & Simulations
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.