Features and Benefits
- 8 analog-to-digital converters (ADCs) integrated into 1 package
- 100 mW ADC power per channel at 65 MSPS
- SNR = 60.8 dB (to Nyquist)
- ENOB = 9.8 bits
- SFDR = 80 dBc (to Nyquist)
- Excellent linearity
- DNL = ±0.3 LSB (typical); INL = ±0.4 LSB (typical)
- Serial LVDS (ANSI-644, default)
- Low power, reduced signal option (similar to IEEE 1596.3)
- Data and frame clock outputs
- 325 MHz, full-power analog bandwidth
- 2 V p-p input voltage range
- 1.8 V supply operation
- Please See the Data Sheet for Additional Information
The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. Operating at a conversion rate of up to 65 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock (DCO) for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user- defined test patterns entered via the serial port interface (SPI).
The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.
- Small Footprint. Eight ADCs are contained in a small package.
- Low Power of 100 mW per Channel at 65 MSPS.
- Ease of Use. A data clock output (DCO) operates up to 300 MHz and supports double data rate (DDR) operation.
- User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements.
- Pin-Compatible Family. This includes the AD9222 (12-bit) and AD9252 (14-bit).
- Medical imaging and nondestructive ultrasound
- Portable ultrasound and digital beam-forming systems
- Quadrature radio receivers
- Diversity radio receivers
- Tape drives
- Optical networking
- Test equipment
Product Lifecycle Not Recommended for New Designs
This designates products ADI does not recommend broadly for new designs.
Evaluation Kits (2)
This page contains evaluation board documentation and ordering information for evaluating the AD9212.
The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.
Features & Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Documentation & Resources
AN-742: Frequency Domain Response of Switched Capacitor ADCs9/10/2020
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual8/18/2020
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)5/12/2015
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)2/14/2015
AN-282: Fundamentals of Sampled Data Systems2/14/2015
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)2/14/2015
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)2/14/2015
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)2/14/2015
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. C)2/14/2015
AN-345: Grounding for Low-and-High-Frequency Circuits2/14/2015
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012
AN-737: How ADIsimADC Models an ADC (Rev. B)11/9/2007
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)9/20/2006
• Software Download (zip, 21,702,560 bytes)
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)12/14/2004
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)11/29/2004
Tools & Simulations
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
|Part Number||Material Declaration||Reliability Data||Pin/Package Drawing||CAD Symbols, Footprints & 3D Models|
|AD9212ABCPZ-40||Material Declaration||Reliability Data||64-Lead LFCSP (9mm x 9mm w/ EP)|
|AD9212ABCPZ-65||Material Declaration||Reliability Data||64-Lead LFCSP (9mm x 9mm w/ EP)|
|AD9212ABCPZRL7-40||Material Declaration||Reliability Data||64-Lead LFCSP (9mm x 9mm w/ EP)|
|AD9212ABCPZRL7-65||Material Declaration||Reliability Data||64-Lead LFCSP (9mm x 9mm w/ EP)|
|Wafer Fabrication Data|
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Sample & Buy
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Buy Now Pricing
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.