AD4052
Compact, Low Power, 16-Bit, 2 MSPS/500 kSPS Easy Drive SAR ADC
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Features
- Small footprint, big performance
- INL: ±0.5 LSB maximum
- SNR: 86.1 dB with VREF = 3.3 V
- 1.35 mW at 1 MSPS in Sample Mode
- 370 μW at 1 MSPS in Autonomous Modes
- 4.1 μW standby power
- Versatile signal conditioning integration
- Easy Drive features enable small, low-power analog front end designs
- Compatible with differential and single-ended signal chains
- Wide common-mode input range
- Minimizes digital host activity and power dissipation
- Autonomous sampling with window comparator and interrupt generation
- Averaging filter with continuous and burst sampling options
- Power cycling synchronization for companion devices
- 4-wire SPI compatible with 1.8 V to 3.3 V logic
- 2.0 mm × 2.6 mm LFCSP and 1.7 mm × 2.0 mm WLCSP
- Wide operating temperature range: −40°C to +125°C
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The AD4052/AD4058 areversatile, 16-bit, successive approximation register (SAR) analog-to-digital converter (ADC) that enables low-power, high-density data acquisition solutions without sacrificing precision. This ADC offers a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system. The AD4052/AD4058 are ideal for battery-powered, compact data acquisition and edge sensing applications.
The Easy Drive features enable highly efficient analog front end (AFE) designs. The small sampling capacitors (3.4 pF) maximize input impedance, thus reducing the dependence on high-bandwidth, power-hungry amplifiers typically required by SAR ADCs. The wide input common-mode range grants inherent support for both differential and single-ended signals.
The AD4052/AD4058 support microcontrollers with power-down modes and interrupt-driven firmware. The autonomous modes enable out-of- range event detection while the digital host sleeps. The averaging modes deliver on-demand, high-resolution measurements while offloading computations from the host processor. The self-timed device enable signal (DEV_EN) synchronizes AFE device power cycling to the ADC sampling instant, optimizing system power consumption while minimizing power-up settling error artifacts. The AD4052/AD4058 also supports power cycling the voltage reference and using the supply as the ADC reference voltage (VREF) for additional power savings.
Device configuration and ADC data readback are supported via a robust, 4-wire serial peripheral interface (SPI) with cyclic redundancy check (CRC) supported for all data transfers. The AD4052/AD4058 are available in compact LFCSP and WLCSP packages and operates across a wide temperature range, making it ideal for a diverse set of applications.APPLICATIONS
- Battery-powered data acquisition
- Vital signs monitoring
- Biological and chemical analysis
- Geologic and seismic sensing
- Motion and robotics
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Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
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AD4052
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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
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| AD4052BCBZ-RL7 | CHIPS W/SOLDER BUMPS/WLCSP |
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| AD4052BCPZ-R2 | LFCSP:LEADFRM CHIP SCALE |
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| AD4052BCPZ-RL7 | LFCSP:LEADFRM CHIP SCALE |
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- AD4052BCBZ-RL7
- Pin/Package Drawing
- CHIPS W/SOLDER BUMPS/WLCSP
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD4052BCPZ-R2
- Pin/Package Drawing
- LFCSP:LEADFRM CHIP SCALE
- Documentation
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HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD4052BCPZ-RL7
- Pin/Package Drawing
- LFCSP:LEADFRM CHIP SCALE
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
Software & Part Ecosystem
Mbed Support
Looking for Evaluation Software? You can find it here
| Parts | Product Life Cycle | Description | ||
|---|---|---|---|---|
|
Positive Linear Regulators (LDO)3 |
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RECOMMENDED FOR NEW DESIGNS |
20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator |
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RECOMMENDED FOR NEW DESIGNS |
20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator |
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PRODUCTION |
Ultralow Noise, 150 mA CMOS Linear Regulator |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 1
EVAL-AD4052-ARDZ
Evaluating the AD4050/AD4052 Compact, Low Power, 12-Bit/16-Bit, 2 MSPS Easy Drive SAR ADCs
Features and Benefits
- Full featured evaluation boards for the AD4050 and AD4052 with a USB power solution
- Single differential channel and common-mode input available through SMA connectors
- Out of the box evaluation experience with the SDP-K1
- PC software (ACE plugin) for control and data analysis of the time and frequency domains
- Compatible with other Arduino form factor controller boards
Product Detail
The EVAL-AD4050-ARDZ and EVAL-AD4052-ARDZ evaluation boards enable quick and easy evaluation of the performance and features of the AD4050 or the AD4052, respectively. The AD4050 and AD4052 are compact, low power, 12-bit or 16-bit (respectively) Easy Drive successive approximation register (SAR) analog-to-digital converters (ADCs).
The primary controller board for the EVAL-AD4050-ARDZ/EVALAD4052- ARDZ is the SDP-K1. The EVAL-AD4050-ARDZ/EVALAD4052- ARDZ conform to the Arduino® Uno Shield mechanical and electrical standards to interface with the SDP-K1, in addition to various software development kits from other manufacturers.
The AD4050/AD4052 evaluation solutions include the AD4050/ AD4052 industrial input and output (IIO) firmware application drivers for device configuration and ADC data capture and the AD4050/ AD4052 ACE plugin graphical user interface (GUI) for performance evaluation.
IBIS Model
