Features and Benefits
- Multichannel, 14-bit, 1 MSPS analog-to-digital converter (ADC)
- Up to 16 ADC input channels
- 8 x 12-bit VDACs with a range of 0 V to 2.5 V or AVDD
- 4 x 12-bit IDACs with a range of 0 mA to 150 mA
- Voltage comparator
- ARM Cortex-M3 processor, 32-bit RISC architecture
- 80 MHz PLL with programmable divider
- Trimmed on-chip oscillator (±3%)
- 2 × 128 kB independent Flash/EE memories
- 10,000 cycle Flash/EE endurance
- 20-year Flash/EE retention
- 32 kB SRAM
- MDIO slave up to 4 MHz
- 2 × I2C, 2 × SPI, UART
- Fully specified for −40°C to +105°C ambient operation
See data sheet for additional features.
The ADuCM320i is a fully integrated single package device that incorporates high performance analog peripherals together with digital peripherals controlled by an 80 MHz ARM® Cortex™-M3 processor and integral flash for code and data.
The ADC on the ADuCM320i provides 14-bit, 1 MSPS data acquisition on up to 16 input pins that can be programmed for single-ended or differential operation. The voltage at the IDAC output pins can also be measured by the ADC, which is useful for controlling the power consumption of the current DACs. Additionally, chip temperature and supply voltages can be measured.
The ADC input voltage is 0 V to VREF. A sequencer is provided, which allows a user to select a set of ADC channels to be measured in sequence without software involvement during the sequence. The sequence can optionally repeat automatically at a user selectable rate.
Up to eight VDACs are provided with output ranges that are programmable to one of two voltage ranges.
Four IDAC sources are provided. The output currents are programmable with a range of 0 mA to 150 mA. A low drift band gap reference and voltage comparator completes the analog input peripheral set.
The ADuCM320i can be configured so that the digital and analog outputs retain their output voltages and currents through a watchdog or software reset sequence. Thus, a product can remain functional even while the ADuCM320i is resetting itself.
The ADuCM320i has a low power ARM Cortex-M3 processor and a 32-bit RISC machine that offers up to 100 MIPS peak performance. Also integrated on chip are 2 × 128 kB Flash/EE memory and 32 kB of SRAM. The flash comprises two separate 128 kB blocks supporting execution from one flash block and simultaneous writing/erasing of the other flash block.
The ADuCM320i operates from an on-chip oscillator or a 16 MHz external crystal and a PLL at 80 MHz. This clock can optionally be divided down to reduce current consumption. Additional low power modes can be set via software. In normal operating mode, the ADuCM320i digital core consumes about 300 µA per MHz.
The device includes an MDIO interface capable of operating at up to 4 MHz. The capability to simultaneously execute from one flash block and write/erase the other flash block makes the ADuCM320i ideal for 10G, 40G, and 100G optical applications. User programming is eased by incorporating PHYADR and DEVADD hardware comparators. In addition, the nonerasable kernel code plus flags in user flash provide assistance by allowing user code to robustly switch between the two blocks of user flash code and data spaces.
The ADuCM320i integrates a range of on-chip peripherals that can be configured under software control, as required in the application. These peripherals include 1 × UART, 2 × I 2 C, and 2 × SPI serial input/output (I/O) communication controllers, GPIO, 32-element programmable logic array, 3 general-purpose timers, plus a wake-up timer and system watchdog timer. A 16-bit PWM with seven output channels is also provided.
GPIO pins on the device power up in high impedance input mode. In output mode, the software chooses between opendrain mode and push-pull mode. The pull-up resistors can be disabled and enabled in software. In GPIO output mode, the inputs can remain enabled to monitor the pins. The GPIO pins can also be programmed to handle digital or analog peripheral signals, in which case the pin characteristics are matched to the specific requirement.
A large support ecosystem is available for the ARM Cortex-M3 processor to ease product development of the ADuCM320i. Access is via the ARM serial wire debug port (SW-DP). On-chip factory firmware supports in-circuit serial download via I2C. These features are incorporated into a low cost QuickStart™ development system supporting this precision analog microcontroller family.
Note that throughout this data sheet, multifunction pins, such as VDAC0/P5.3, are referred to either by the entire pin name or by a single function of the pin, for example, VDAC0, when only that function is relevant.
- Optical networking
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The ADuCM320 is a dual-die stack system on-chip designed for diagnostic control on fixed wavelength laser optical module applications. It features a 16-bit (14-bit accurate) multichannel SAR ADC, an ARM® Cortex™-M3 processor, 8 voltage DACs, 4 current output DACs, and flash/EE memory packaged in a 6 mm × 6 mm 96 ball BGA package.The ADuCM320 development system allows evaluation of ADuCM320 silicon.
Development System Kit Contents
- An evaluation board (EVAL-ADuCM320EBZ) that facilitates performance evaluation of the device with a minimum of external components
- An Analog Devices, Inc., J-Link OB emulator (USB-SWD/UART-EMUZ)
- 1 USB cable
- 1 installation DVD
Documentation & Resources
Software & Systems Requirements
Tools & Simulations
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.