Features and Benefits
- 450 MHz (2.7GFLOPS) per core
- 3Mbits/384KB L1 memory/core with parity
- Optional cache/SRAM mode
- 32-bit, 40-bit & 64-bit floating point support
- 256KB L2 SRAM with ECC protection
- DDR3-900, DDR2-800 & LPDDR (16-bit)
- FFT/iFFT (18 GFLOPS, 5usec per 1K-pt FFT)
- FIR/IIR and SINC Filters, ASRC
- Security Crypto Engines with OTP
- 19mm × 19mm BGA (0.8mm pitch)
- Commercial, Industrial & Automotive
- Up to 8x Full SPORT interfaces (w/ TDM & I2S modes)
- S/PDIF Tx/Rx, 8x ASRC pairs, PCG
- 2x Dual-SPI and 1x QuadSPI (w/ direct execution)
- 2x CAN2.0
- MLB 3/6-pin (Auto devices only)
- 3x I2C and 3x UARTs (w/ Flow Control)
- Enhanced Parallel Peripheral Interface
- For video I/O or parallel converter interface
- 2x Link Ports (bi-directional, 8-bit, up to 150MB/sec)
- 3x Enhanced PWM, ADC Control Module (ACM)
- 8x GP Timer, 1x GP Counter, WDT and RTC
- Up to 80 GPIO (mux’ed w/ other interfaces)
- 8-ch 12-bit 1MSPS Housekeeping ADC
- Thermal Sensor
The ADSP-21583 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+® cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated. Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.
The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.
The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 450 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1.5 Mbytes of fast on-chip SRAM and a DDR3/2/LP interface aid efficient real-time performance while the memory subsystem includes major enhancements with advanced DMA engines for simultaneous data transfer.
With software IP protection a growing industry security concern, ARM® TrustZone® security and an onboard crypto hardware accelerators are included. For applications where reliability is a critical requirement, memory parity and error-correction hardware provide higher data integrity. The overall integration and low-power features offered by the new ADSP-SC58x and ADSP-2158x series deliver significant BOM and board area savings and provide lower design complexity and reduced time to market for today’s complex applications.
The ADSP-SC58x/2158x is supported by ADI’s award winning Crosscore® Embedded Studio development tool suite, providing design engineers with interactive, real-time development tools that help optimize their design and speed time to market.
Additionally, ADI and Micrium have collaborated to offer µC/OS-II® & µC/OS-III® real-time kernels on SHARC+.
The compatible ADSP-SC584 EZ-KIT-Lite development board and ICE-1000/2000 emulators facilitate the creation, test, and debug of advanced applications. Working in tandem with CrossCore Embedded Studio, the emulators provide state-of-the-art support for all JTAG-compliant Analog Devices processors now utilizing CoreSight™ from ARM.
Markets and Technologies
ADSP-SC58x and ADSP-2158x Series: Summary and Comparison
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (3)
The Analog Devices ICE-1000 and ICE-2000 emulators facilitate the creation, test, and debug of advanced applications on Analog Devices Processors and DSPs. Working in tandem with the CrossCore® Embedded Studio development environment, these emulators provide state-of-the-art support for all JTAG-compliant Analog Devices processors.
New debug feature added for the ICE-1000/ICE-2000:
- Coresight Serial Wire Debug (SWD)
Features & Benefits
- JTAG/SWD support for Blackfin, Blackfin+, SHARC and multi-core SHARC+ with ARM
- Plug-n-Play, USB 2.0 compliant
- USB bus-powered device
- Windows® 8.1, Window 7 compatible
- Multiple processor I/O voltage support: 1.8V, 2.5V, and 3.3V
- Multiprocessor support
- JTAG/SWD clock operation of 5 MHz on the ICE-1000
- JTAG/SWD clock operation up to 46 MHZ on the ICE-2000
- Multi-colored LED for enhanced status indication
- Software controlled target reset to support remote debug
The ADSP-SC584 EZ-KIT Lite and EZ-Board® are evaluation systems for the ADSP-SC58x family of SHARC® processors. The ADSP-SC584 processor is based on the SHARC+™ core dual processor with the arm® Cortex-A5™ processor core and is designed for a wide array of markets, from automotive and pro-audio to industrial-based applications that require high floating-point performance. The EZ-Board is shipped with all of the necessary hardware—you can start the evaluation immediately. The package contains the standalone evaluation board, CE-approved power supply, and USB cable. The EZ-KIT Lite® version ships with two 180 day licenses for CrossCore® Embedded Studio (CCES) and the ICE-1000 emulator, while the EZ-Board version requires the customer to provide an ICE-1000 or ICE-2000 emulator.
Expansion Interface III connectors are provided for interfacing with additional extender boards to provide LCD, camera, video, and audio. Traditional mechanical switches for changing the board's factory setup have been removed in favor of I2C controlled software switches. The only remaining mechanical switches are the boot mode switch, JTAG configuration switches, and push buttons.
The evaluation board is designed to be used in conjunction with the CrossCore® Embedded Studio (CCES) development tools to test capabilities of the ADSP-SC58x processors. The development environment aids advanced application code development and debug, such as:
- Create, compile, assemble, and link application programs written in C++, C, and assembly
- Load, run, step, halt, and set breakpoints in application programs
- Read and write data and program memory
- Read and write core and peripheral registers
Features & Benefits
- ADSP-SC584 349-pin 19x19mm BGA
- 2Gb DDR3 Memory
- 128 Mb SPI Flash
- Ethernet (10/100 & GigE)
- ADAU1977 quad ADC
- ADAU1979 quad ADC
- ADAU1962A 12 channel 24-bit DAC
- AD2410 Automotive Audio Bus (A2B)
- SPDIF in/out, optical & coax
- 2 CAN transceivers + RJ11 connectors
- USB OTG
- EI3 Expansion Interface
- EZLITE includes ICE-1000 JTAG emulator and a permanent CrossCore® Embedded Studio license for use with the EZLITE via ICE-1000
HDMI Audio EI3 EZ-Extender
The HDMI Audio EI3 EZ-Extender is a separately sold daughter board that plugs onto the expansion interface III of the EZ-Board evaluation platform. The daughter board aids the design and prototyping phases of HDMI HD audio decode/encode applications. The board extends the capabilities of the evaluation system by providing a connection to three analog audio codecs along with an HDMI transmitter/receiver.
The HDMI Audio EI3 EZ-Extender’s analog audio interface is comprised of three Analog Devices AD1939 multichannel audio codecs. The AD1939 is a high performance, single-chip codec featuring four analog-to-digital converters (ADCs) for audio input and eight digital-to-analog converters (DACs) for audio output. This translates to twelve channels of audio in and twenty four channels of audio out. The codec/extender can input and output data at a sample rate of up to 192 kHz on all channels.
This HDMI Audio EI3 EZ-Extender connects with the Expansion Interface 3 (EI3) which gives the user more available signals on the interface connectors and a reduction in size over the previous EI2 specification. Software examples are provided to demonstrate the functionality of the devices on the Extender Board.
Features & Benefits
- Analog audio interface
- AD1939 – three Analog Devices 192 kHz audio codecs
- 24 channels of audio out (twelve stereo channels)
- Twelve channels of audio in (six stereo channels)
- TDM and I2S modes at 48 kHz, 96 kHz, and 192 kHz sample rates
- HDMI Interface
- ADV7625 HDMI Transmitter/Receiver
- 8 channels of HD audio from HDMI (7.1 surround sound)
- 4 HDMI Inputs and 2 HDMI outputs
- Single-ended input/output
- Twelve RCA phono jack inputs
- Twenty four RCA phono jack outputs
- IR Interface
- HDMI CEC/remote control support
Documentation & Resources
EE-401: ADSP-SC5xx/215xx SHARC+ Processor System Optimization Techniques (Rev. 1)2/9/20182 M
• EE-401: Associated Zip FileZIP
EE-379: ADSP-214xx vs ADSP-SC58x/ADSP-2158x - Peripheral Considerations (Rev. 1)11/27/2017387 K
EE-400: Using Cache on ADSP-SC5xx/ADSP-215xx SHARC+ Processors (Rev. 1)9/25/2017405K
• EE-400: Associated CodeZIP
EE-392: Estimating Power for ADSP-SC58x/2158x SHARC+ Processors (Rev. 1)11/4/2016854 K
• EE-392: Associated CodeZIP
EE-386: Using the Security Packet Engine to Protect Data (Rev. 1)10/20/2016500 K
• EE-386: Associated CodeZIP
EE-375: Migrating Legacy SHARC to ADSP-SC58x/2158x SHARC+ Processors (Rev. 1)1/19/20161 M
EE-378: Processor Comparison Guide (ADSP-BF60x/BF70x vs ADSP-SC58x/2158x) (Rev. 1)1/19/2016554 K
EE-387: Interfacing DDR3/DDR2/LPDDR Memory to ADSP-SC5xx/ADSP-215xx Processors (Rev. 3)1/8/20162 M
• EE-387: Associated Zip FileZIP
EE-383: MDMA-Based Dual-SHARC+ Parallel Pipeline Audio Talkthrough12/18/2015874 K
• EE-383: Associated CodeZIP
EE-385: Implementing the RSA Cryptosystem with the Public Key Accelerator12/18/2015572 K
• EE-385: Associated CodeZIP
EE-384: Tips and Tricks Using the ADSP-SC58x/ADSP-2158x Processor Boot Rom (Rev. 1)9/30/2015477 K
• EE-384: Associated ZIP FileZIP
EE-366: Secure Booting Guide for Blackfin+® and SHARC+® Processors (Rev. 2)11/26/2014588 K
• EE-366: Code ExampleZIP
EE-253: Power Bypass Decoupling of SHARC® Processors (Rev. 1)12/5/2006354 kB
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/200590 kB
SHARC+ Core Programming Reference5/1/20214 M
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference (Rev 1.0)4/28/201618 M
ADSP-SC58X/ADSP-2158X: Silicon Anomaly Sheet (Rev. E)6/29/2015273 K
ADSP-SC58x and ADSP-2158x Series10/3/2016
Software & Systems Requirements
Software Development Tools
CrossCore Utilities provides several utilities for use with Cortex-M processors. These utilities have previously been distributed within various Board Support Packages for the IAR and Keil toolchains, and are collected together in this product for convenient maintenance.
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
Tools & Simulations
BSDL Model Files
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
|Part Number||Material Declaration||Reliability Data||Pin/Package Drawing||CAD Symbols, Footprints & 3D Models|
|ADSP-21583BBCZ-4A||Material Declaration||Reliability Data||349-Ball CSPBGA (19mm x 19mm)|
|ADSP-21583CBCZ-4A||Material Declaration||Reliability Data||349-Ball CSPBGA (19mm x 19mm)|
|ADSP-21583KBCZ-4A||Material Declaration||Reliability Data||349-Ball CSPBGA (19mm x 19mm)|
|Wafer Fabrication Data|
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