The ADRF5515A is a dual-channel, integrated RF, front-end, multichip module designed for time division duplexing (TDD) applications. The device operates from 3.3 GHz to 4.0 GHz. The ADRF5515A is configured in dual channels with a cascading, two-stage low noise amplifier (LNA) and a high-power silicon singlepole, double-throw (SPDT) switch.
In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.05 dB and a high gain of 36 dB at 3.6 GHz, with an output third-order intercept (OIP3) point of 35 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 17 dB of gain at a lower current of 48 mA. In power-down mode, the LNAs are turned off and the device draws 13 mA.
In transmit operation, when RF inputs are connected to a termination pin (TERM-CHA or TERM-CHB), the switch provides low insertion loss of 0.5 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 43 dBm for full lifetime operation.
The device comes in an RoHS-compliant, compact, 6 mm × 6 mm, 40-lead lead frame chip scale package (LFCSP).
APPLICATION
Wireless infrastructure
TDD massive multiple input and multiple output and active antenna systems
TDD-based communication systems
