The ADRF5515 is a dual-channel, integrated radio frequency (RF), front-end multichip module designed for time division duplexing (TDD) applications that operates from 3.4 GHz to 4.0 GHz. The ADRF5515 is configured in dual channels with a cascading two-stage low noise amplifier (LNA) and a high power silicon single-pole, double-throw (SPDT) switch.
In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure (NF) of 1.0 dB and a high gain of 33 dB at 3.6 GHz with an output third-order intercept point (OIP3) of 32 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 16 dB of gain at a lower current of 36 mA. In power-down mode, the LNAs are turned off and the device draws 12 mA.
In transmit operation, when RF inputs are connected to a termination pin (TERM-CHA or TERM-CHB), the switch provides a low insertion loss of 0.45 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 43 dBm for full lifetime operation.
The ADRF5515 is pin-compatible with the ADRF5545A, 10W version, which operates from 2.4 GHz to 4.2 GHz.
The ADRF5515 does not require any matching components at the RF ports that are internally matched to 50 Ω. ANT and TERM ports are also internally ac-coupled. Therefore, only RX ports require external dc blocking capacitors.
The device comes in an RoHS compliant, compact, 6 mm × 6 mm, 40-lead LFCSP package.
Applications
- Wireless infrastructure
- TDD massive multiple input and multiple output and active antenna systems
- TDD-based communications systems
