Features and Benefits
- Dual differential Tx
- Dual differential Rx
- Observation receiver with 2 inputs
- Fully integrated, ultralow power DPD actuator and adaptation engine for PA linearization
- Sniffer receiver with 3 inputs
- Tunable range: 300 MHz to 6000 MHz
- Linearization signal BW to 40 MHz
- Tx synthesis BW to 250 MHz
- Rx BW: 8 MHz to 100 MHz
- Supports FDD and TDD operation
- Fully integrated independent fractional-N RF synthesizers for Tx, Rx, ORx, and clock generation
- JESD204B digital interface
The AD9375 is a highly integrated, wideband radio frequency (RF) transceiver offering dual-channel transmitters (Tx) and receivers (Rx), integrated synthesizers, a fully integrated digital predistortion (DPD) actuator and adaptation engine, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption required by 3G/4G small cell and massive multiple input, multiple output (MIMO) equipment in both frequency division duplex (FDD) and time division duplex (TDD) applications. The AD9375 operates from 300 MHz to 6000 MHz, covering most of the licensed and unlicensed cellular bands. The DPD algorithm supports linearization on signal bandwidths up to 40 MHz depending on the power amplifier (PA) characteristics (for example, two adjacent 20 MHz carriers). The IC supports Rx bandwidths up to 100 MHz. It also supports observation receiver (ORx) and Tx synthesis bandwidths up to 250 MHz to accommodate digital correction algorithms.
The transceiver consists of wideband direct conversion signal paths with state-of-the-art noise figure and linearity. Each complete Rx and Tx subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digital filters, eliminating the need for these functions in the digital baseband. Several auxiliary functions such as an auxiliary analog-to-digital converter (ADC), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integrated to provide additional monitoring and control capability.
An ORx channel with two inputs is included to monitor each Tx output and implement calibration applications. This channel also connects to three sniffer receiver (SnRx) inputs that can monitor radio activity in different bands.
The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four lanes are dedicated to the receiver and observation receiver channels.
The fully integrated phase-locked loops (PLLs) provide high performance, low power, fractional-N frequency synthesis for the Tx, the Rx, the ORx, and the clock sections. Careful design and layout techniques provide the isolation demanded in high performance base station applications. All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count.
The device contains a fully integrated, low power DPD actuator and adaptation engine for use in PA linearization. The DPD feature enables use of high efficiency PAs, significantly reducing the power consumption of small cell base station radios while also reducing the number of JESD204B lanes necessary to interface with baseband processors.
A 1.3 V supply is required to power the AD9375 core, and a standard 4-wire serial port controls it. Other voltage supplies provide proper digital interface levels and optimize transmitter and auxiliary converter performance. The AD9375 is packaged in a 12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).
- 3G/4G small cell base stations (BTS)
- 3G/4G massive MIMO/active antenna systems
ADI has partnered with leading power amplifier vendors to optimize linearization performance of high-efficiency PAs with the AD9375 DPD. Please visit the DPD landing page for the Tested Reports for PAs with a range of different output powers and frequencies.
ADI's DPD Calculator shows the improvement in linearity that DPD provides for a wide range of signal configurations and power amplifier output power ratings. Use the drop-down menu in the Performance tab to select your linearization scenario, and the Performance Tool will display RF spectrum plots and signal measurements demonstrating the results of linearization.
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
The ADRV9375-N/PCBZ and ADRV9375-W/PCBZ are radio cards designed to showcase the AD9375, the first wideband RF transceiver with integrated DPD targeting 3G/4G small cell and massive MIMO. The radio card provides a single 2x2 transceiver platform for device evaluation and rapid prototyping of radio solutions. All peripherals necessary for the radio card to operate including a high efficiency switcher only power supply solution, and a high performance clocking solution are populated on the board. In addition, a 3rd party PA evaluation card is included in the package for DPD evaluation.
The ADRV9375-N/PCBZ has the same matching network as the ADRV9371-N/PCBZ. The ADRV9375-W/PCBZ has the same matching network as the ADRV9371-W/PCBZ. For more information, please click here.
Features & Benefits
- Complete Radio Card platform containing AD9375 DPD with high efficiency PA
- Narrow band and wide band tuning range
- ADRV9375-N/PCBZ matched for 1.8GHz – 2.6GHz
- ADRV9375-W/PCBZ matched for 300MHz – 6GHz
- Complete with high efficiency power supply solution and clocking solution for AD9375
- FMC connector to Xilinx ZC706 motherboard
- Powered from single FMC connector
- Includes schematics, layout, BOM, HDL, drivers and application software
The ADRV-DPD1/PCBZ is a 24 dBm per path, 2 × 2 multiple input, multiple output (MIMO) radio board, which uses the AD9375, a highly integrated radio frequency (RF) transceiver with integrated digital predistortion (DPD). The radio board is designed to be used with the dual connector interposer board to interface with the EVAL-TPG-ZYNQ3 or other Xilinx® or Avnet evaluation boards for the Xilinx Zynq™-7000 field programmable gate array (FPGA) platform, which has a dual core ARM Cortex®-A9 processor running a Linux® variant.
The AD9375 small cell evaluation software (SCES), AD9375 Small Cell Radio Reference Design Evaluation Software GUI, can configure and control the ADRV-DPD1/PCBZ board. Note that the Mykonos transceiver evaluation software (MTES) and DPD graphical user interface (GUI) software are not compatible with the ADRV-DPD1/PCBZ.
Full specifications on the AD9375 are available in the AD9375 data sheet available from Analog Devices, Inc., and must be consulted in conjunction with this user guide when using the evaluation board.
Features & Benefits
- Complete JESD204B to antenna port design with AD9375 DPD and SKY66297-11 PA
- 2 × 2 LTE 20 MHz, 250 mW output power per antenna, Band 7 FDD
- Contains transceiver, 2 PAs, 2 LNAs, duplex filters, and dc power solution
- Power consumption of radio board: approximately 10 W
- Powered from single 12 V supply
- Evaluation kit connects to baseband subsystem
Software & Systems Requirements
Wideband RF Transceiver Evaluation Software
JESD204 Interface Framework
Tools & Simulations
FPGA Interoperability Reports (2)
Technical Articles (1)
Press Releases (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.