AD5317

PRODUCTION

+2.5 V to +5.5 V, 400µA, Quad Rail-To-Rail Output 10-Bit DAC

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Overview

  • Four 10-Bit DACS in 16-Lead TSSOP
  • Low Power: 500 µA @ 5 V, 400 µA @ 3 V
  • Power-Down to 300 nA @ 5 V, 90nA @ 3 V
  • Guaranteed Monotonic by Design
  • Power-On-Reset to Zero Volts
  • Double-Buffered Input Logic
  • Output Range: 0 V to VREF or 0 V to 2VREF
  • SDO Daisy-Chaining Option
  • Low Power, SPI, QSPI, MICROWIRE and DSP-Compatible 3-Wire Serial Interface
  • Simultaneous Update of DAC Outputs via LDAC pin (active low)
  • Asynchronous Clear Facility via CLR pin (active low)
  • Buffered/Unbuffered Reference Input Options for each DAC pair

The AD5307 / AD5317 / AD5327 are quad 8-, 10-, and 12-bit buffered voltage-output DACs, in a 16-lead TSSOP package, which operate from a single 2.5 V to 5.5 V supply consuming 400 µA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/µs. The AD5307 / AD5317 / AD5327 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and are compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.

PRODUCT HIGHLIGHTS

  1. Available in a 16-lead TSSOP package
  2. Low power, single supply operation from 2.5 V to 5.5 V supply
  3. Consumes 1.2mW at 3 V and 2.5 mW at 5 V
  4. Rail-to-Rail output with a slew rate of 0.7 V/µs
  5. 3-wire serial interface with clock rates up to 30 MHz
  6. Pin- and Software-Compatible with the AD5307 (8-Bit) and the AD5327 (12-Bit)

AD5317
+2.5 V to +5.5 V, 400µA, Quad Rail-To-Rail Output 10-Bit DAC
AD5307/AD5317/AD5327 Functional Block Diagram AD5307/AD5317/AD5327 Pin Configuration
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Hardware Ecosystem

Parts Product Life Cycle Description
AD5317R PRODUCTION Quad, 10-Bit nanoDAC® with 2 ppm/°C Reference, SPI Interface
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Tools & Simulations

Precision DAC Error Budget Tool

The Precision DAC Error Budget Tool is a web application that calculates the DC Accuracy of precision DAC signal chains. It shows how the static errors accumulate throughout your signal chain to quickly evaluate the design tradeoffs. Calculations include the DC errors introduced by Voltage References, Operation Amplifiers and Precision DACs.

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