概览

优势和特点

  • SPI interface with error detection
    • Includes CRC, invalid read/write address, and SCLK count error detection
    • Supports burst mode and daisy-chain mode
    • Industry-standard SPI Mode 0 and SPI Mode 3 interface compatible
  • Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
  • 1 Ω typical on resistance at 25°C
  • 0.23 Ω typical on resistance flatness at 25°C
  • VSS to VDD analog signal range
    • Fully specified at ±5 V, 12 V, 5 V, and 3.3 V
    • ±3.3 V to ±8 V dual-supply operation
    • 3.3 V to 16 V single-supply operation
  • 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
  • 4 mm × 4 mm, 24-lead LFCSP package

产品详情

The ADGS1612 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read/write address detection, and serial clock (SCLK) count error detection.

It is possible to daisy-chain multiple ADGS1612 devices together. Daisy-chaining enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS1612 can also operate in burst mode to decrease the time between SPI commands.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.

The ultralow on resistance (RON) of these switches make them ideal solutions for data acquisition and gain switching applications where low RON and low distortion are critical. The RON profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. The ADGS1612 exhibits break-before-make switching action for use in multiplexer applications. Note that throughout this data sheet, the multifunction pin, RESET/VL, is referred to either by the entire pin name or by a single function of the pin, for example, VL, when only that function is relevant.

Product Highlight

  1. The SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count.
  2. Daisy-chain mode removes additional logic traces when multiple devices are used.
  3. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface.
  4. CRC error detection capabilities allow the use of the ADGS1612 in safety critical systems.
  5. Guaranteed break-before-make switching allows the use of the ADGS1612 in multiplexer configurations with external wiring.
  6. Minimum distortion.

Applications

  • Communication systems
  • Medical systems
  • Audio and video signal routing
  • Automatic test equipment
  • Data acquisition systems
  • Battery-powered systems
  • Sample-and-hold systems
  • Relay replacements
 

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IBIS模型

SPICE模型

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所示报价为单片价格。所列的美国报价单仅供预算参考,指美元报价(每片美国离岸价),如有修改恕不另行通知。由于地区关税、商业税、汇率及手续费原因,国际报价可能不同。