AD4885

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Dual-Channel 16-Bit, 10MSPS, SAR ADC with Analog Front End

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产品技术资料帮助

ADI公司所提供的资料均视为准确、可靠。但本公司不为用户在应用过程中侵犯任何专利权或第三方权利承担任何责任。技术指标的修改不再另行通知。本公司既没有含蓄的允许,也不允许借用ADI公司的专利或专利权的名义。本文出现的商标和注册商标所有权分别属于相应的公司。

概述

  • Integrated fully-differential ADC drivers
    • Wide input common-mode voltage range
    • High common-mode rejection
    • Single-ended to differential conversion
  • Gain options include: 1.03, 1.25, 1.53, 2.03, 2.74, 4.11, and 5.77
    • Integrated gain-setting resistors
  • High performance
    • 16-bit resolution, no missing codes
    • Throughput: 10MSPS per channel
    • Conversion latency: 131.25ns
    • INL: 3ppm (typical), 4.6ppm (maximum)
    • SNR/THD
      • 92dBFS (typical)/-118dBc (typical) at fIN = 1kHz
      • 91.1dBFS (typical)/-109dBc (typical) at fIN = 500kHz
      • Noise spectral density: -158.8dBFS/Hz
  • Low power
    • 88.9mW per channel typical at 10MSPS
  • Integrated, low-drift reference buffers and decoupling
  • Integrated VCM generation
  • Digital features and data interface
    • Conversion result FIFO, 16k samples per channel
    • Digital averaging filter with up to 210 decimation
  • SPI configuration per channel
  • Configurable data interface per channel
    • Single lane, DDR, serial LVDS, 160Mbps per lane
    • Dual lane, DDR, serial LVDS, 80Mbps per lane
    • Single/quad lane SPI data interface
  • Package
    • 196-ball, 10mm × 10mm CSP_BGA, 0.65mm pitch
    • Integrated supply decoupling capacitors
  • Operating temperature range: −40°C to +85°C
AD4885
Dual-Channel 16-Bit, 10MSPS, SAR ADC with Analog Front End
AD4885 Typical Application Diagram AD4885 Functional Block Diagram AD4885 Pin Configuration AD4885 Chip Illustration
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IBIS 模型 1

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