- 256kB FIFO深度
- 644 MSPS SDR和1.2 GSPS DDR并行输入
- 基于Virtex-6 FPGA
The HSC-ADC-EVALEZ FMC-Compatible high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up and supports emerging serial interface standards, like JESD204B. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.