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AD6652:  12位、65 MSPS中频至基带分集接收机

AD6652是一款混合信号中频至基带接收机，由双通道12位MSPS ADC和一个宽带多模式数字下变频器(DDC)组成，旨在支持具有低成本、小尺寸、多功能要求的通信应用。AD6652也适合成像、医疗超声、仪器仪表和测试设备方面的其它应用。

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  • 信噪比(SNR)：90 dB（150 kHz带宽，至奈奎斯特频率，61.44 MSPS）
  • 最差谐波：83 dBc（至奈奎斯特频率，61.44 MSPS）

    • 集成双通道ADC：

  • 采样速率最高达65 MSPS
  • 中频采样频率达200 MHz
  • ADC内部基准电压源
  • 集成ADC采样保持输入
  • 灵活的模拟输入范围（1 V 峰峰值至2 V峰峰值）
  • 差分模拟输入
  • ADC时钟占空比稳定器
  • 通道隔离/串扰：85 dB

    • 集成宽带数字下变频器(DDC)：

  • 交叉开关DDC输入
  • 针对非整数抽取的数字再采样
  • 可编程抽取FIR滤波器
  • 针对多载波和相控阵实现灵活控制
  • 用于输出电平控制的双AGC级
  • 两路16位并行或8位链路输出端口
  • 用户可配置的内置自测试(BIST)功能
  • 节能省电模式
  • Digital TX/RX: RX
  • Input Sampling (MSPS): 65MSPS
  • Resampler: X
  • Digital AGC: X
  • Baseband Interface: Parallel
  • Input Ports: 2
  • Ouput Ports: 2
  • Package: BGA

AD6652功能框图

Download this Selection Table
(pdf, 22,589 bytes)

Last Updated: 9/2007
DDCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6620 65

1 Channel

(main and diversity)

1 Channel

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

 1 Channel
AD6624 80

4 Channels

2 samples per symbol

2 Channels

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

 4 Channels

1 sample per chip
AD6624A 100

2 Channels with FPGA for serial to parallel conversion

2 samples per chip
AD6634 80

4 Channels

2 samples per symbol

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

4 Channels

1 sample per chip
AD6635 80

8 Channels

2 samples per symbol

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

8 Channels

1 sample per chip
AD6636 150

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip
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DUCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6622

75

4 Channels

Serial output

2 Channels

Serial output

1 Channel

Serial output

1 Channel

Serial output

4 Channels

Serial output
AD6623 104

4 Channels

Modulate using I/Q symbols

Direct modulation xPSK

Mode switching

Power Ramping

2 Channels (real output)

Serial output

Includes IIR filter for phase pre-distortion

2 Channels (real output)

Serial output

2 Channels (real output)

Serial output

4 Channels

Serial output

Power Ramping

Direct modulation
AD6633 125

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

Includes IIR filter for phase pre-distortion

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter
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Integrated ADC/DDC Receivers
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6652 65

4 Channels

2 samples per symbol

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

4 Channels

1 sample per chip
AD6653 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor
AD6654 92.16

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip
AD6655 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor
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QDUCs
Generic Part # Master Clock (MSPS min) Power Supply Voltage (Vnom) Power Dissipation (mW max) Description
AD9856 200 Single (+3) 1590 200 MHz Quadrature Digital Upconverter With 12-Bit Data Path
AD9857 200 Single (3.3 V) 2029 200 MSPS Quadrature Digital Upconverter with 14-bit Data Path
AD9957 1000 Multi (1.8, 3.3) 1800 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC
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价格、封装以及购买

打印表
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