HMC265-Die

PRODUCTION

Sub-Harmonic Mixer Chip, 20 - 32 GHz

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Overview

  • Integrated LO Amplifier: -4 dBm Input
  • Sub-Harmonically Pumped (x2) LO
  • Integrated IF Amplifier: 3 dB Gain
  • Small Size: 1.32 × 1.32 × 0.1 mm

The HMC265 chip is a sub-harmonically pumped (x2) MMIC downconverter with integrated LO & IF amplifiers. The chip utilizes a GaAs PHEMT technology that results in a small overall chip area of 1.74 mm2. The 2LO to RF isolation is excellent eliminating the need for additional filtering. The LO amplifier is a single bias (+3V to +4V) two stage design with only -4 dBm nominal drive requirement. All data is with the chip in a 50 ohm test fixture connected via 0.025 mm (1 mil) diameter wire bonds of minimal length <0.31 mm (<12 mils). This downconverter IC is an excellent, smaller, and more reliable replacement to hybrid diode based downconverter MMIC assemblies.

APPLICATIONS

  • Microwave Point-to-Point Radios
  • LMDS
  • SATCOM

HMC265-Die
Sub-Harmonic Mixer Chip, 20 - 32 GHz
HMC265 Functional Block Diagram
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Documentation

Data Sheet 1

Data Sheet

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Tools & Simulations

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

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S-Parameter 1

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