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ADF4196:  Low Phase Noise, Fast Settling 6 GHz PLL Frequency Synthesizer

Информация о продукте

Статус продукта:Рекомендовано для новых разработок

The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations, and the fast settling feature makes the ADF4196 suitable for pulse Doppler radar applications.

The ADF4196 consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump. A differential amplifier converts the differential charge pump output to a single-ended voltage for the external voltage controlled oscillator (VCO). The sigma-delta (Σ-Δ) based fractional interpolator, working with the N divider, allows programmable modulus fractional-N division. Additionally, the 4-bit reference (R) counter and on-chip frequency doubler allow selectable reference signal (REFIN) frequencies at the PFD input.

A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a VCO. The switching architecture ensures that the PLL settles within the GSM time slot guard period, removing the need for a second PLL and associated isolation switches. This decreases the cost, complexity, PCB area, shielding, and characterization found on previous ping-pong GSM PLL architectures.

Applications

  • GSM/EDGE base stations
  • PHS base stations
  • Pulsed Doppler Radar
  • Instrumentation and test equipment
  • Beam-forming/phased array systems

ОСОБЕННОСТИ И ПРЕИМУЩЕСТВА

  • Fast settling, fractional-N
    PLL architecture
  • Single PLL replaces ping-pong synthesizers
  • Frequency hop across GSM band in 5 μs with phase settled within 20 μs
  • 1 degree rms phase error at
    4 GHz RF output
  • Digitally programmable output phase
  • Digitally programmable output phase
  • RF input range up to 6 GHz
  • 3-wire serial interface
  • On-chip, low noise differential amplifier
  • Phase noise figure of merit: –216 dBc/Hz
  • Loop filter design possible using ADIsimPLL

Functional Block Diagram for ADF4196

Документация

Наименование Тип контента Тип файлов
ADF4196: Low Phase Noise, Fast Settling, 6 GHz PLL Frequency Synthesizer Data Sheet (Rev C, 01/2013) (pdf, 2801 kB) Технические описания PDF
AN-873: Обнаружение входа в синхронизм в семействе синтезаторов с ФАПЧ ADF4xxx  (pdf, 207 kB) Статьи по применению PDF
AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers  (pdf, 207 kB) Статьи по применению PDF
Fundamentals of Frequency Synthesis, Part 1: Phased Locked Loops
The first of a two-part series on frequency synthesis, with an introduction to Phased Locked Loops. This webcast looks at the need for frequency generation, the techniques from the past present and future, and how to assess the performance of a frequency synthesis, and real world applications. Particular attention will be focused on Phase Locked Loops (PLL's) as frequency synthesizers.
Webcasts WEBCAST
Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
Webcasts WEBCAST
UG-536: Evaluating the ADF4193 and ADF4196 Frequency Synthesizers for Phase-Locked Loops  (pdf, 443 kB) Руководства пользователей PDF
UG-476: PLL Software Installation Guide  (pdf, 520 kB) Руководства пользователей PDF
RF Source Booklet  (PDF, 4353 kB)
RF IC Product Overview - Version P (02/2014)
Обзор PDF
PLLs/Synthesizers Product Highlight  (pdf, 269 kB) Обзор PDF
PLL Synthesizers/VCOs - Overview  (pdf, 510 kB) Обзор PDF
Clock and Timing ICs  (pdf, 4970 kB) Обзор PDF
RAQs index Rarely Asked Questions HTML
Словарь терминов Глоссарий HTML

Средства разработки, программные модели, драйверы и ПО

Наименование Тип контента Тип файлов
ADIsimRF
ADI’s ADIsimRF design tool provides calculations for the most important parameters within the RF signal chain, including cascaded gain, noise figure, IP3, P1dB, and total power consumption.
ADIsim Design/Simulation Tools HTML
ADIsimPLL™- Version 3.43
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
ADIsim Design/Simulation Tools HTML
ADF4196 Evaluation Board Software  (zip, 1165 kB) Evaluation Software ZIP

Оценочные наборы, обозначения компонентов и шаблоны посадочных мест на ПП

Оценочные платы и наборыОзнакомьтесь с документацией и условиями покупки

Обозначения и посадочные места— Analog Devices предлагает библиотеки компонентов, совместимые с широким спектром современных САПР.

Рекомендации по выбору продуктов и типовые проекты

Сопутствующие компоненты

Suggested Companion Products


Recommended RF Mixers for the ADF4196
  • For 10 MHz to 6 GHz high dynamic range active mixers, we recommend the ADL5801 or the dual ADL5802.
Recommended Modulators/Demodulators for the ADF4196
  • For broadband quadrature IF/RF signals, we recommend the ADL5375 and the ADL5380.
Recommended Divide-by-4 Prescaler for the ADF4196
  • For a low noise, low power, fixed RF block, we recommend the ADF5001.
Recommended PLL Active Filter for the ADF4196
  • For an ultralow noise, rail-to-rail amplifier, we recommend the OP184.
Recommended Linear Regulators for the ADF4196
  • For ultralow noise, 3V applications,150mA output, we recommend the ADP150.
  • For ultralow noise, 3V applications, 200mA output, we recommend the ADP151.
  • For high accuracy, 5V applications, we recommend the ADP3334.
  • For a step up, 3V to 5V regulator, we recommend the ADP1613.

Recommended Power Solutions

  • For selecting voltage regulator products, use ADIsimPower.

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Приведенные цены действительны в США и указаны только для примерного бюджетного рассчета. Цены указаны в долларах США (за штуку в указанном размере партии) и могут быть изменены. Цены в других регионах могут отличаться в зависимости от местных пошлин, налогов, сборов и курсов валют. Для уточнения стоимости обращайтесь в местные офисы продаж Analog Devices, или к официальным дистрибьюторам. Цены на оценочные платы и наборы указаны за штуку независимо от количества.

Модели Описание Цена Без использования свинца PCN/PDN Проверка наличия/
Покупка/Запрос образца
EV-ADF4196SD1Z Статус: Prodn Evaluation Board (No VCO or Loop Filter) $ 141,00 Да -
EVAL-SDP-CS1Z Статус: Prodn SDP-S Controller Board - Interface to EV-ADF4196SD1Z (also required) $ 49,00 Да -

Цены указаны за одну штуку, в долларах США, на условиях ФОБ. Являются рекомендованными розничными ценами в США, приведены только для примерного расчета и могут меняться. Международные цены могут отличаться на величину местных пошлин, налогов, сборов и курсов валют.

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