| Title | Content Type | File Type |
|---|---|---|
| ADF4196: Low Phase Noise, Fast Settling, 6 GHz PLL Frequency Synthesizer Data Sheet (Rev C, 01/2013) (pdf, 2801 kB) | Data Sheets | |
| AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers (pdf, 207 kB) | Application Notes | |
|
Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs. |
Webcasts | WEBCAST |
| UG-536: Evaluating the ADF4193 and ADF4196 Frequency Synthesizers for Phase-Locked Loops (pdf, 443 kB) | User Guides | |
| UG-476: PLL Software Installation Guide (pdf, 520 kB) | User Guides | |
| New Analog Devices’ PLL Synthesizers Deliver Utmost Flexibility and Phase Noise Performance (05 Jan 2012) | Press Releases | HTML |
| PLLs/Synthesizers Product Highlight (pdf, 269 kB) | Overview | |
| PLL Synthesizers/VCOs - Overview (pdf, 510 kB) | Overview | |
|
RF Source Booklet
(pdf, 815 kB)
RF IC Product Overview - Version O (11/2012) |
Overview | |
| Clock and Timing ICs (pdf, 4970 kB) | Overview | |
| RAQs index | Rarely Asked Questions | HTML |
| Glossary of EE Terms | Glossary | HTML |
| Title | Content Type | File Type |
|---|---|---|
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ADIsimRF
ADI’s ADIsimRF design tool provides calculations for the most important parameters within the RF signal chain, including cascaded gain, noise figure, IP3, P1dB, and total power consumption. |
ADIsim Design/Simulation Tools | HTML |
|
ADIsimPLL™- Version 3.43
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market. |
ADIsim Design/Simulation Tools | HTML |
| ADF4196 Evaluation Board Software (zip, 1165 kB) | Evaluation Software | ZIP |
Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.
Sample & Buy| Model | Package | Pins | Temp. Range |
Packing, Qty |
Price*(100-499) | Price*1000 pcs | RoHS | View PCN/ PDN | Check Inventory/ Purchase/Sample |
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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.