The AD9119/AD9129 are high performance, 11-/14-bit RF digital-to-analog converters (DACs) supporting data rates up to 2.8 GSPS. The DAC core is based on a quad-switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.6 GSPS when configured for Mix-Mode™ or 2× interpolation. The high dynamic range and bandwidth enable multicarrier generation up to 4.2 GHz.
In baseband mode, wide bandwidth capability combines with high dynamic range to support from 1 to 158 contiguous carriers for CATV infrastructure applications. A choice of two optional 2× interpolation filters is available to simplify the postreconstruction filter by effectively increasing the DAC update rate by a factor of 2. In Mix-Mode operation, the AD9119/AD9129 can reconstruct RF carriers in the second and third Nyquist zone while still maintaining exceptional dynamic range up to 4.2 GHz. The high performance NMOS DAC core features a quad-switch architecture that enables industry-leading direct RF synthesis performance with minimal loss in output power. The output current can be programmed over a range of 9.5 mA to 34.4 mA.
The AD9119/AD9129 include several features that may further simplify system integration. A dual-port, source synchronous LVDS interface simplifies the data interface to a host FPGA/ASIC. A differential frame/parity bit is also included to monitor the integrity of the interface. On-chip delay locked loops (DLLs) are used to optimize timing between different clock domains.
A serial peripheral interface (SPI) is used to configure the AD9119/AD9129 and monitor the status of readback registers. The AD9119/AD9129 is manufactured on a 0.18 μm CMOS process and operates from +1.8 V and −1.5 V supplies. It is supplied in a 160-ball chip scale package ball grid array.PRODUCT HIGHLIGHTS
|Title||Content Type||File Type|
|AD9119/AD9129: 11-/14-Bit, 5.7 GSPS, RF Digital-to-Analog Converter Data Sheet (Rev A, 09/2013) (pdf, 905 kB)||Data Sheets|
|AN-1296: Optimizing Power Supplies for the AD9129 (pdf, 146 kB)||Application Notes|
|MS-2643: Understanding and Designing Wideband Output Networks for High Speed Digital-to-Analog Converters (pdf, 1328 kB)||Technical Articles|
|RF DACs simplify power and space in downstream cable transmitter systems||Technical Articles||HTML|
|FPGA Mezzanine Card Simplifies JESD204B-Compatible Data Converter-to-FPGA Connectivity (13 Nov 2012)||Press Releases||HTML|
|Analog Devices’ DOCSIS 3.0-Compliant RF D/A Converter Operates at One-Third the Power of Competing Devices and Reduces PCB Space by 25 Percent (16 Oct 2012)||Press Releases||HTML|
|Glossary of EE Terms||Glossary||HTML|
|Title||Content Type||File Type|
|AD9129 IBIS Model (ibs)||IBIS Models||IBS|
|ADI AD-FMCJESDADC1-EBZ Boards & Xilinx Reference Design (Wiki Site)||Device Drivers||HTML|
|AD9129 Evaluation Board, DAC-FMC Interposer & Xilinx ML-605 Reference Design||FPGA HDL||HTML|
|AD-FMCJESDADC1-EBZ Rapid Development Board & Xilinx Reference Design||FPGA HDL||HTML|
Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.
Were these recommendations helpful?
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.