Proper supply sequencing and supervision are key aspects of a stable multi-power-supply system, but supply specifications are often finalized near the end of the project. This puts pressure on the supervisor and sequencing components to remain versatile, even as they are built into the design.
The LTC2928 offers a solution to the problem of moving target designs by using a simple approach to sequencing and supervision—no complicated firmware or software needed. You can configure sequence and supervisor thresholds, supply sequence order and timing with just a few components. The number of sequenced and supervised supplies is unlimited—just cascade multiple LTC2928s through a single pin. System faults can shutdown all controlled supplies immediately, and application faults are detected and reported by the LTC2928, making quick work of fault diagnosis.
A Simple But Powerful Design Idea
One of the best ways to avoid expensive design rework at the back end of a project is to use the LTC2928 in generic reusable circuit blocks that are added early in the system design with little regard to the final specific power requirements. Leave blocks unfinished—simply waiting for passive component values to be determined. When final decisions about the power supplies’ operating specifications are determined, calculate the values for a few passive components and populate the empty spaces in the circuit. Changes are easy—no costly rework and testing.
Loaded with Features
Designing with the LTC2928 requires little more than specifying a few resistors, capacitors and the biasing of some three-state pins. Design flexibility however, is virtually unlimited. Table 1 outlines a few design features and configuration options available in the LTC2928.
|High Voltage Operation: 7.2V to 16.5V
Low Voltage Operation: 2.9V to 6V
|Power-Up and Power-Down Sequencing (Positive and Negative Supplies)
Sequenced Shutdown upon Loss of VCC*
|±1.5% Accurate Under Voltage Comparators
Over Voltage Comparators
Sequence Threshold Comparators
Negative Supply Comparator
|Fault Channel and Fault Type Reporting
Under Voltage Fault
Over Voltage Fault
|N-Channel MOSFET Gate Drive||•|
|Power Supply Capacitance Discharge*||•|
|RESET Disable for Margining||•|
|Single Pin Cascading for More Supplies and Time Positions||•|
|Fast Shutdown at Power-Down*||•|
|Individual Comparator Outputs||•|
|Adjustable Sequence, Power-Good and Reset Timers||•|
|*see data sheet|
Let the LTC2928 Configurator Tool Design It for You
Configuring an LTC2928 application is simple (see “How to Set Up the LTC2928” in this article), but why should you have to do any calculation at all? To make life truly simple, Linear Technology offers free configuration software that calculates all resistor values, capacitor values and required logic connections. The tool also generates schematics and a passive element bill-of-materials. All you need to know are your supply parameters and sequence. The LTC2928 Configurator can be obtained from LTC applications staff members.
How to Set Up the LTC2928
This section describes how to calculate the component values required to set particular supervisor and sequence parameters. The calculations are not difficult, but we recommend using the LTC2928 Configurator, a free calculation tool that does much of the work for you (see “The LTC2928 Configurator Tool Designs It for You” above). Either way, be sure to call about the available demo board, which you can use to quickly evaluate any configuration.
Figures 1 and 2 show a generic LTC2928 application and waveforms for the discussion and calculations here.
To set the supervisor undervoltage threshold at the V1 input (UVTH1), calculate the ratio for the resistive divider (R1B, R1A) between supply voltage S1 and ground:
The resistive dividers for the other positive supervisor inputs are calculated in the same way.
If a negative supply is monitored on the V1 input, tie the VSEL pin to VCC. Connect the ground side of R1A to the REF pin. The reference voltage provides level shifting of the negative supply to the ground sensing comparator on the V1 input. Calculate the resistive divider ratio using
where VREF is nominally 1.189 volts.
In the power supply world, undervoltage thresholds are commonly discussed as a percentage below the nominal supply voltage. The same is true for the LTC2928, but all other thresholds in the LTC2928 (sequence-up, sequence-down and overvoltage) are keyed to the configured undervoltage thresholds on each respective input, and are expressed as a percentage of the undervoltage threshold. A bias on the OVA pin globally configures the overvoltage threshold for all positive supplies. Use a resistor to ground to configure overvoltage thresholds in the range of 12% to 32% above the undervoltage threshold. Use a resistor to VCC for overvoltage thresholds greater than 32% above the undervoltage threshold. Use Figures 3 and 4 to select the OVA biasing resistor.
Typically, a single resistor (RTn) sets the power supply’s sequencing time position. The normal sequence-down order is the reverse of the sequence-up order, and order is preserved regardless of the number of cascaded LTC2928 devices. The sequence up/down time positions can also be actively changed—see “Active Sequence Positioning” below. In this generic application, supply S1 is shown to start in time position 5 (TP5). Time position resistor RT1 is connected between VCC and the RT1 input pin. Time position resistors and the corresponding ideal time position voltages are given in Table 2. To configure time position 5 for supply S1, a 9.53kΩ resistor is selected. Time positions 6, 7 and 8 are similarly selected with RT resistors for supplies S2, S3 and S4.
|Position Number||RT (kΩ)||Ideal RT Pin Set Point (VRT / VCC) ±0.005|
|1||95.3||1/9 = 0.111|
|2||42.2||2/9 = 0.222|
|3||24.3||3/9 = 0.333|
|4||15.0||4/9 = 0.444|
|5||9.53||5/9 = 0.556|
|6||6.04||6/9 = 0.667|
|7||3.40||7/9 = 0.778|
|8||1.50||8/9 = 0.889|
Any sequencer/supervisor channel that must be shut off or is otherwise unused may be disabled by pulling the corresponding RT pin low (ground). Prior to sequencing-up, with the ON pin low, any or all enable pins may be forced high by pulling the respective RT pin to VCC. In this manner, supplies may be tested individually or together in any combination.
Transition the ON pin to begin sequencing-up or down. The shortest time delay between two time positions (TP2–TP1 for this example) or the time delay between an ON pin transition and the next time position is defined to be equal to tSTMR (sequence timer delay). The time between two adjacent time positions is potentially stretched by a power supply’s rise time to its configured sequence-up threshold. In Figure 2, supply S1 has a finite rise time tRISE(S1) to the sequence-up threshold SQTH1. Using three-state pins SQT1 and SQT2 (not shown), sequence-up thresholds can be set to equal to 100%, 67% or 33% of the configured undervoltage threshold. The time between TP5 and TP6 is seen to be equal to tRISE(S1) plus one tSTMR. The sequence timer delay is set with capacitor CSTMR and is calculated from
The PTMR pin configures the power-good timer which is used as a watchdog for stalled power supplies. When sequencing-up, a sequence fault is generated if any sequenced supply fails to reach its undervoltage threshold during the power-good time-out period. When sequencing-down, a sequence fault is generated if any sequenced supply fails to reach its sequence-down threshold during the power-good time-out period. The power-good timer starts with the first enabled (disabled) supply and is terminated when the last supply reaches its undervoltage threshold (sequence-down threshold). The power-good timeout period is set with capacitor CPTMR and is calculated from
To disable the power-good timer, simply tie the PTMR pin to ground. To avoid generating sequence faults due to insufficient power-good timer period, be careful to add some time margin to the minimum recommended power-good timeout period. The minimum recommended time consists of the time difference between the first and last enabled (disabled) supplies added to the sum of supply rise (fall) times. The minimum recommended power-good timeout is given by
In this example, with the simplifying assumption of equal rise and fall times for all four supplies, the minimum recommended power-good timeout period reduces to
Again, adding some additional time margin to this minimum time is helpful to avoid bogus sequence faults. Details regarding the biasing (high, low or open) of the three-state configuration pins (MS1, MS2, SQT1, SQT2, RDIS) are discussed in the LTC2928 data sheet.
Active Sequence Positioning
In most sequencing applications, the sequence-down order is the reverse of the sequence-up order. While the LTC2928 easily handles such applications, it is not limited to same up, same down sequencing. Two methods are available to obtain flexible sequencing order. The first technique uses a simple analog multiplexer to switch the resistance seen at the RT pin(s). The second technique uses a rail-to-rail voltage output DAC, preferably with I2C interface, such as the LTC2629, to directly drive a programmed voltage to the RT pin(s). Both methods require changing the voltage (VRT) seen at the RT pin(s), subject to the error bound specified in Table 2. The RT pin input resistance is nominally 12k.
Figure 5 shows how a simple analog multiplexer is connected to allow a different sequence position on the basis of the DONE signal. During sequencing-up, the DONE pin is high, so RT1UP is selected. When sequencing-up is complete, DONE pulls low and RT1DN is selected. Sequencing-down commences once the ON pin is pulled low.
Figure 6 demonstrates how the low-power LTC2629 ratiometric voltage output DAC can be used in place of resistors to actively program sequence positions. The LTC2629 uses a 2-wire I2C compatible serial interface and is available in a tiny 16-lead SSOP package. Supply range and output drive capability are compatible with the LTC2928. Most importantly, the LTC2629 incorporates a power-on reset circuit that forces the outputs to zero scale until a valid write and update take place. This feature prevents unintended sequencing in the event that the ON pin is not in the correct state at power-up since the RT pins would be near ground (all sequencing channels disabled).
The LTC2928 greatly reduces the time and cost of power management design by eliminating the need to develop,verify and load firmware at back end test. System control issues such as sequence order, timing, reset generation,supply monitoring and fault management are all handled with the LTC2928.