AN-106F: Instrumentation Circuitry Using RMS-to-DC Converters

Introduction

It is widely acknowledged that RMS (Root of the Mean of the Square) measurement of waveforms furnishes the most accurate amplitude information.¹ Rectify-and-average schemes, usually calibrated to a sine wave, are only accurate for one waveshape. Departures from this waveshape result in pronounced errors. Although accurate, RMS conversion often entails limited bandwidth, restricted range, complexity and difficult to characterize dynamic and static errors. Recent developments address these issues while simultaneously improving accuracy. Figure 1 shows the LTC^®1966/LTC1967/LTC1968 device family. Low frequency accuracy, including linearity and gain error, is inside 0.5% with 1% error at bandwidths extending to 500kHz. These converters employ a sigma-delta based computational scheme to achieve their performance.²

Figure 2’s pinout descriptions and basic circuits reveal an easily applied device. An output filter capacitor is all that is required to form a functional RMS-to-DC converter. Split and single supply powered variants are shown. Such ease of implementation invites a broad range of application; examples begin with Figure 3.

Isolated Power Line Monitor

Before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of this circuit. High voltage, lethal potentials are present in this circuit. Extreme caution must be used in working with, and making connections to, this circuit. Repeat: this circuit contains dangerous, high voltage potentials. Use caution.

Figure 3’s AC power line monitor has 0.5% accuracy over a sensed 90VAC to 130VAC input and provides a safe, fully isolated output. RMS conversion provides accurate reporting of AC line voltage regardless of waveform distortion, which is common.

The AC line voltage is divided down by T1’s ratio. An isolated and reduced potential appears across T1’s secondary B, where it is resistively scaled and presented to C1’s input. Power for C1 comes from T1’s secondary A, which is rectified, filtered and zener regulated to DC. A1 takes gain and provides a numerically convenient output. Accuracy is increased by biasing T1 to an optimal loading point, facilitated by the relatively low resistance divider values. Similarly, although C1 and A1 are capable of single supply operation, split supplies maintain symmetrical T1 loading. The circuit is calibrated by adjusting the 1k trim for 1.20V output with the AC line set at 120VAC. This adjustment is made using a variable AC line transformer and a well floated (use a line isolation transformer) RMS voltmeter.³

Figure 4’s error plot shows 0.5% accuracy from 90VAC to 130VAC, degrading to 1.4% at 140VAC. The beneficial effect of trimming at 120VAC is clearly evident; trimming at full scale would result in larger overall error, primarily due to non-ideal transformer behavior. Note that the data is specific to the transformer specified. Substitution for T1 necessitates circuit value changes and recharacterization.

Fully Isolated 2500V Breakdown, Wideband RMS-to-DC Converter

Note: before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of this circuit. High voltage, lethal potentials are present in this circuit. Extreme caution must be used in working with, and making connections to, this circuit. Repeat: this circuit contains dangerous, high voltage potentials. Use caution.

Accurate RMS amplitude measurement of SCR chopped AC line related waveforms is a common requirement. This measurement is complicated by the SCR’s fast switching of a sine wave, introducing odd waveshapes with high frequency harmonic content. Figure 5’s conceptual SCR-based AC/DC converter is typical. The SCRs alternately chop the 220VAC line, responding to a loop enforced, phase modulated trigger to maintain a DC output. Figure 6’s waveforms are representative of operation. Trace A is one AC line phase, trace B the SCR cathodes. The SCR’s irregularly shaped waveform contains DC and high frequency harmonic, requiring wideband RMS conversion for measurement. Additionally, for safety and system interface considerations, the measurement must be fully isolated.

Figure 7 provides isolated power and data output paths to an RMS-to-DC converter, permitting safe, wideband, digital output RMS measurement. A pulse generator configured comparator combines with Q1 and Q2 to drive T1, resulting in isolated 5V power at T1’s rectified, filtered and zener regulated output. The RMS-to-DC converter senses either 135VAC or 270VAC full-scale inputs via a resistive divider. The converter’s DC output feeds a self-clocked, serially interfaced A/D converter; optocouplers convey output data across the isolation barrier. The LTC6650 provides a 1V reference to the A/D and biases the RMS-to-DC converter’s inputs to accommodate the voltage divider’s AC swing. Calibration is accomplished by adjusting the 20k trim while noting output data agreement with the input AC voltage. Circuit accuracy is within 1% in a 200kHz bandwidth.

Low Distortion AC Line RMS Voltage Regulator

Note: before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of this circuit. High voltage, lethal potentials are present in this circuit. Extreme caution must be used in working with, and making connections to, this circuit. Repeat: this circuit contains dangerous, high voltage potentials. Use caution.

Almost all AC line voltage regulators rely on some form of waveform chopping, clipping or interruption to function. This is efficient, but introduces waveform distortion, which is unacceptable in some applications. Figure 8 regulates the AC line’s RMS value within 0.25% over wide input swings and does not introduce distortion. It does this by continuously controlling the conductivity of a series pass MOSFET in the AC lines path. Enclosing the MOSFET in a diode bridge permits it to operate during both AC line polarities.

The AC line voltage is applied to the Q2-diode bridge. The Q2-diode bridge output is sensed by a calibrated variable voltage divider which feeds C1. C1’s output, representing the regulated lines RMS value, is routed to control amplifier A1 and compared to a reference. A1’s output biases Q1, controlling drive to a photovoltaic optoisolator. The optoisolator’s output voltage provides level-shifted bias to diode bridge enclosed Q2, closing a control loop which regulates the output’s RMS voltage against AC line and load shifts. RC components in A1’s local feedback path stabilize the control loop. The loop operates Q2 in its linear region, much like a common low voltage DC linear regulator. The result is absence of introduced distortion at the expense of lost power. Available output power is constrained by heat dissipation. For example, with the output adjustment set to regulate 10V below the normal input, Q2 dissipates about 10W at 100W output. This figure can be improved upon. The circuit regulates for V_IN ≥ 2V above V_OUT, but operation in this region risks regulation dropout as V_IN varies.

Circuit details include JFET Q5 and associated components. The passive components associated with Q5’s gate form a slow turn-on negative supply for C1. They also provide gate bias for Q5. Q5, a soft-start, prevents abrupt AC power application to the output at start-up. When power is off, Q5 conducts, holding A1’s “+” input low. When power is applied, A1 initially has a zero volt reference, causing the control loop to set the output at zero. As the 1MΩ 0.22μF combination charges, Q5’s gate moves negative, causing its channel conductivity to gradually decay. Q5 ramps off, A1’s positive input moves smoothly towards the LT6650’s 400mV reference, and the AC output similarly ascends towards its regulation point. Current sensor Q6, measuring across the 0.7Ω shunt, limits output current to about 1A. At normal line inputs (90VAC to 135VAC) Q4 supplies 5V operating bias to the circuit. If line voltage rises beyond this point, Q3 comes on, turning off Q4 and shutting down the circuit.

X1000 DC Stabilized Millivolt Preamplifier

The preceding circuits furnish high level inputs to the RMS converter. Many applications lack this advantage and some form of preamplifier is required. High gain pre-amplification for the RMS converter requires more attention than might be supposed. The preamplifier must have low offset error because the RMS converter (desirably) processes DC as legitimate input. More subtly, the preamplifier must have far more bandwidth than is immediately apparent. The amplifiers –3db bandwidth is of interest, but its closed loop 1% amplitude error bandwidth must be high enough to maintain accuracy over the RMS converter’s 1% error passband. This is not trivial, as very high open-loop gain at the maximum frequency of interest is required to avoid inaccurate closed-loop gain.

Figure 9 shows an x1000 preamplifier which preserves the LTC1966’s DC-6kHz 1% accuracy. The amplifier may be either AC or DC coupled to the RMS converter. The 1mV full-scale input is split into high and low frequency paths. AC coupled A1 and A2 take a cascaded, high frequency gain of 1000. DC coupled, chopper stabilized A3 also has X1000 gain, but is restricted to DC and low frequency by its RC input filter. Assuming the switch is set to “DC + AC,” high and low frequency path information recombine at the RMS converter. The high frequency paths 650kHz –3db response combines with the low frequency sections microvolt level offset to preserve the RMS converters DC-6kHz 1% error. If only AC response is desired, the switch is set to the appropriate position. The minimum processable input, set by the circuits noise floor, is 15μV.

Wideband Decade Ranged X1000 Preamplifier

The LTC1968, with a 500kHz, 1% error bandwidth, poses a significant challenge for an accurate preamplifier, but Figure 10 meets the requirement. This design features decade ranged gain to X1000 with a 1% error bandwidth beyond 500kHz, preserving the RMS converters 1% error bandwidth. Its 20μV noise floor maintains wideband performance at microvolt level inputs.

Q1A and Q1B form a low noise buffer, permitting high impedance inputs. A1 and A2, both gain switchable, take cascaded gain in accordance with the figure’s table. The gains are settable via reed relays controlled by a 2-bit code. A2’s output feeds the RMS converter and the converter’s output is smoothed by a Sallen-Keys active filter. The circuit maintains 1% error over a 10Hz to 500kHz bandwidth at all gains due to the preamplifiers –3db, 10MHzbandwidth. The 10Hz low frequency restriction could be eliminated with a DC stabilization path similar to Figure 9’s but its gain would have to be switched in concert with the A1-A2 path.

Figure 11 shows preamplifier response to a 1mV input step at a gain of X1000. A2’s output is singularly clean, with trace thickening in the pulse flat portions due to the 20μV noise floor. The 35ns risetime indicates a 10MHz bandwidth.

To calibrate this circuit first set S1 and S2 high, ground the input and trim the “zero” adjustment for zero VDC at A2’s output. Next, set S1 and S2 low, apply a 1V, 100kHz input, and trim “A = 1” for unity gain, measured at the circuit output, in accordance with the table in the figure. Continue this procedure for the remaining three gains given in the table. A good way to generate the accurate low level inputs required is to set a 1.00VAC level and divide it down with a high grade 50Ω attenuator such as the Hewlett Packard 350D or the Tektronix 2701. It is prudent to verify the attenuator’s output with a precision RMS voltmeter.⁴

Wideband, Isolated, Quartz Crystal RMS Current Measurement

Quartz crystal RMS operating current is critical to long-term stability, temperature coefficient and reliability. Accurate determination of RMS crystal current, especially in low power types, is complicated by the necessity to minimize introduced parasitics, particularly capacitance, which corrupt crystal operation. Figure 12, a form of Figure 10’s wideband amplifier, combines with a commercially available closed core current probe to permit the measurement. An RMS-to-DC converter supplies the RMS value. The quartz crystal test circuit shown in dashed lines exemplifies a typical measurement situation. The Tektronix CT-2 current probe monitors crystal current while introducing minimal parasitic loading (see Figure 14). The probe’s 50Ω termination allows direct connection to A1—Figure 10’s FET buffer is deleted. Additionally, because quartz crystals are not common below 4kHz, A1’s gain does not extend to low frequency.

Figure 13 shows results. Crystal drive, taken at Q1’s collector (trace A), causes a 25μA RMS crystal current which is represented at the RMS-to-DC converter input (trace B). The trace enlargement is due to the preamplifier’s 5μA RMS equivalent noise contribution.

Figure 14 details characteristics of two Tektronix closed core current probes. The primary trade-off is low frequency error versus sensitivity. There is essentially no probe noise contribution and capacitive loading is notably low. Circuit calibration is achieved by putting 1mA RMS current through the probe and adjusting the indicated trim for a 1V circuit output. To generate the 1mA, drive a 1k, 0.1% resistor with 1V_RMS.⁵

AC Voltage Standard with Stable Frequency and Low Distortion

Figure 15 utilizes the RMS-to-DC converter’s stability in an AC voltage standard. Initial circuit accuracy is 0.1% and long-term (6 months at 20°C to 30°C) drift remains within that figure. Additionally, the 4kHz operating frequency is within 0.01% and distortion inside 30ppm.

A1 and its power buffer A3 sense across a bridge composed of a 4kHz quartz crystal and an RC impedance in one arm; resistors and an LED driven photocell comprise the other arm. A1 sees positive feedback at the crystals 4kHz resonance, promoting oscillation. Negative feedback, stabilizing oscillation amplitude, occurs via a control path which includes an RMS-to-DC converter and amplitude control amplifier, A5. A5 acts on the difference between A3’s RMS converted output and the LT1009 voltage reference. Its output controls the LED driven photocell to set A1’s negative feedback. RC components in A5’s feedback path stabilize the control loop. The 50k trim sets the optically driven resistor’s value to the point where lowest A3 output distortion occurs while maintaining adequate loop stability.

Normally the bridge’s “bottom” would be grounded. While this connection will work, it subjects A1 to common mode swings, increasing distortion due to A1’s finite common mode rejection versus frequency. A2 eliminates this concern by forcing the bridges mid-points, and hence common mode voltage, to zero while not influencing desired circuit operation. It does this by driving the bridge “bottom” to force its input differential to zero. A2’s output swing is 180° out of phase with A3’s circuit output. This action eliminates common mode swing at A1, reducing circuit output distortion by more than an order of magnitude. Figure 16 shows the circuits 1.414V_RMS (2.000V_PEAK) output in trace A while trace B’s distortion constituents include noise, fundamental related residue and 2F components.

The 4kHz crystal is a relatively large structure with very high Q factor. Normally, it would require more than 30 seconds to start and arrive at full regulated amplitude. This is avoided by inclusion of the Q1-LTC201 switch circuitry. At start-up A5’s output goes high, biasing Q1. Q1’s collector goes low, turning on the LTC201. This sets A1’s gain abnormally high, increasing bridge drive and accelerating crystal start-up. When the bridge arrives at its operating point A5’s output drops to a lower value, Q1 and the LTC201 switch go off, and the circuit transitions into normal operation. Start-up time is several seconds.

The circuit requires trimming for amplitude accuracy and lowest distortion. The distortion trim is made first. Adjust the trim for minimal output distortion as measured on a distortion analyzer. Note that the absolute lowest level of distortion coincides with the point where control loop gain is just adequate to maintain oscillation. As such, find this point and retreat from it into the control loop’s active region. This necessitates giving up about 5ppm distortion, but 30ppm is achievable with good control loop stability. Output amplitude is trimmed with the indicated adjustment for exactly 1.414V_RMS (2.000V_PEAK) at the circuit output.

RMS Leveled Output Random Noise Generator

Figure 17 uses the RMS-to-DC converter in a leveled output random noise generator. Noise diode D1 AC biases A1, operating at a gain of 2.⁶ A1’s output feeds a 1kHz to 500kHz switch selectable lowpass filter. The filter output biases the variable gain amplifier, A2-A3. A2-A3, contained on one chip, include a current controlled transconductance amplifier (A2) and an output amplifier (A3). This stage takes AC gain, biases the LTC1968 RMS-to-DC converter and is the circuit’s output. The RMS converter output at A4, feeds back to gain control amplifier A5, which compares the RMS value to a variable portion of the 5.1V zener potential. A5’s output sets A2’s gain via the 3k resistor, completing a control loop to stabilize noise RMS output amplitude. The RC components in A5’s local feedback path stabilize this loop. Output amplitude is variable by the 10k potentiometer; a switch permits external voltage control. Q1 and associated components, a soft-start circuit, prevent output overshoot at power turn-on.

Figure 18 shows circuit output noise in the 10kHz filter position; Figure 19’s spectral plot reveals essentially flat RMS noise amplitude over a 500kHz bandwidth.

RMS Amplitude Stabilized Level Controller

Figure 20 borrows the previous circuit’s gain control loop to stabilize the RMS amplitude of an arbitrary input waveform. The unregulated input is applied to variable gain amplifier A1-A2 which feeds A3. DC coupling at A1-A2 permits passage of low frequency inputs. A3’s output is taken by RMS-to-DC converter C1-A4, which feeds the A5 gain control amplifier. A5 compares the RMS value to a variable reference and biases A1, closing a gain control loop. The 0.15μF feedback capacitor stabilizes this loop, even for waveforms below 100Hz. This feedback action stabilizes output RMS amplitude despite large variations in input amplitude while maintaining waveshape. Desired output level is settable with the indicated potentiometer or an external control voltage may be switched in.

Figure 21 shows output response (trace B) to abrupt reference level set point changes (trace A). The output settles within 60 milliseconds for ascending and descending transitions. Faster response is possible by decreasing A5’s compensation capacitor, but low frequency waveforms would not be processable. Similar considerations apply to Figure 22’s response to an input waveform step change. Trace A is the circuit’s input and trace B its output. The output settles in 60 milliseconds due to A5’s compensation. Reducing compensation value speeds response at the expense of low frequency waveform processing capability. Specifications include 0.1% output amplitude stability for inputs varying from 0.4V_RMS to 5V_RMS, 1% set point accuracy, 0.1kHz to 500kHz passband and 0.1% stability for 20% power supply deviation.

Notes

This Application Note was derived from a manuscript originally prepared for publication In EDN magazine.

¹ See Appendix A, “RMS-to-DC Conversion” for complete discussion of RMS measurement.

² Appendix A details sigma-delta based RMS-to-DC converter operation.

³ See Appendix B, “AC Measurement and Signal Handling Practice,” for recommendations on RMS voltmeters and other AC measurement related gossip.

⁴ See Appendix B for recommendations on RMS voltmeters.

⁵ This measurement technique has been extended to monitor 32.768kHz “watch crystal” sub-microampere operating currents. Contact the author for details.

⁶ See Appendix C “Symmetrical White Gaussian Noise,” guest written by Ben Hessen-Schmidt of Noise Com, Inc. for turorial on noise and noise diodes.

Appendix A

RMS-To-DC Conversion

Joseph Petrofsky

Definition of RMS

RMS amplitude is the consistent, fair and standard way to measure and compare dynamic signals of all shapes and sizes. Simply stated, the RMS amplitude is the heating potential of a dynamic waveform. A 1V_RMS AC waveform will generate the same heat in a resistive load as will 1V DC. See Figure A1.

Mathematically, RMS is the “Root of the Mean of the Square”:

Alternatives to RMS

Other ways to quantify dynamic waveforms include peak detection and average rectification. In both cases, an average (DC) value results, but the value is only accurate at the one chosen waveform type for which it is calibrated, typically sine waves. The errors with average rectification are shown in Table A1. Peak detection is worse in all cases and is rarely used.

The last two entries of Table A1 are chopped sine waves as is commonly created with thyristors such as SCRs and Triacs. Figure A2a shows a typical circuit and Figure A2b shows the resulting load voltage, switch voltage and load currents. The power delivered to the load depends on the firing angle, as well as any parasitic losses such as switch “ON” voltage drop. Real circuit waveforms will also typically have significant ringing at the switching transition, dependent on exact circuit parasitics. Here, “SCR Waveforms” refers to the ideal chopped sine wave, though the LTC1966/LTC1967/LTC1968 will do faithful RMS-to-DC conversion with real SCR waveforms as well.

The case shown is for Θ = 90°, which corresponds to 50% of available power being delivered to the load. As noted in Table A1, when Θ = 114°, only 25% of the available power is being delivered to the load and the power drops quickly as Θ approaches 180°.

With an average rectification scheme and the typical calibration to compensate for errors with sine waves, the RMS level of an input sine wave is properly reported; it is only with a non-sinusoidal waveform that errors occur. Because of this calibration, and the output reading in V_RMS, the term True-RMS got coined to denote the use of an actual RMS-to-DC converter as opposed to a calibrated average rectifier.

How an RMS-to-DC Converter Works

Monolithic RMS-to-DC converters use an implicit computation to calculate the RMS value of an input signal. The fundamental building block is an analog multiply/divide used as shown in Figure A3. Analysis of this topology is easy and starts by identifying the inputs and the output of the lowpass filter. The input to the LPF is the calculation from the multiplier/divider; (V_IN)²/V_OUT. The lowpass filter will take the average of this to create the output, mathematically:

Unlike the prior generation RMS-to-DC converters, the LTC1966/LTC1967/LTC1968 computation does NOT use log/antilog circuits, which have all the same problems, and more, of log/antilog multipliers/dividers, i.e., linearity is poor, the bandwidth changes with the signal amplitude and the gain drifts with temperature.

How the LTC1966/LTC1967/LTC1968 RMS-to-DC Converters Work

The LTC1966/LTC1967/LTC1968 use a completely new topology for RMS-to-DC conversion, in which a ΔΣ modulator acts as the divider, and a simple polarity switch is used as the multiplier as shown in Figure A4.

The ΔΣ modulator has a single-bit output whose average duty cycle (D) will be proportional to the ratio of the input signal divided by the output. The ΔΣ is a 2nd order modulator with excellent linearity. The single-bit output is used to selectively buffer or invert the input signal. Again, this is a circuit with excellent linearity, because it operates at only two points: ±1 gain; the average effective multiplication over time will be on the straight line between these two points. The combination of these two elements again creates a lowpass filter input signal equal to (V_IN)²/V_OUT, which, as shown above, results in RMS-to-DC conversion.

The lowpass filter performs the averaging of the RMS function and must be a lower corner frequency than the lowest frequency of interest. For line frequency measurements, this filter is simply too large to implement on-chip, but the LTC1966/LTC1967/LTC1968 need only one capacitor on the output to implement the lowpass filter. The user can select this capacitor depending on frequency range and settling time requirements.

This topology is inherently more stable and linear than log/antilog implementations primarily because all of the signal processing occurs in circuits with high gain op amps operating closed loop.

Note that the internal scalings are such that the ΔΣ output duty cycle is limited to 0% or 100% only when V_IN exceeds ±4 • V_OUT.

Linearity of an RMS-to-DC Converter

Linearity may seem like an odd property for a device that implements a function that includes two very nonlinear processes: squaring and square rooting.

However, an RMS-to-DC converter has a transfer function, RMS volts in to DC volts out, that should ideally have a 1:1 transfer function. To the extent that the input to output transfer function does not lie on a straight line, the part is nonlinear.

A more complete look at linearity uses the simple model shown in Figure A5. Here an ideal RMS core is corrupted by both input circuitry and output circuitry that have imperfect transfer functions. As noted, input offset is introduced in the input circuitry, while output offset is introduced in the output circuitry.

Any nonlinearity that occurs in the output circuity will corrupt the RMS in to DC out transfer function. A nonlinearity in the input circuitry will typically corrupt that transfer function far less simply because with an AC input, the RMS-to-DC conversion will average the nonlinearity from a whole range of input values together.

But the input nonlinearity will still cause problems in an RMS-to-DC converter because it will corrupt the accuracy as the input signal shape changes. Although an RMS-to-DC converter will convert any input waveform to a DC output, the accuracy is not necessarily as good for all waveforms as it is with sine waves. A common way to describe dynamic signal wave shapes is Crest Factor. The crest factor is the ratio of the peak value relative to the RMS value of a waveform. A signal with a crest factor of 4, for instance, has a peak that is four times its RMS value. Because this peak has energy (proportional to voltage squared) that is 16 times (4²) the energy of the RMS value, the peak is necessarily present for at most 6.25% (1/16) of the time.

The LTC1966/LTC1967/LTC1968 perform very well with crest factors of 4 or less and will respond with reduced accuracy to signals with higher crest factors. The high performance with crest factors less than 4 is directly attributable to the high linearity throughout the LTC1966/LTC1967/LTC1968.

Appendix B

AC Measurement and Signal Handling Practice

Accurate AC measurement requires trustworthy instrumentation, proper signal routing technique, parasitic minimization, attention to layout and care in component selection. The text circuits DC-500kHz, 1% error bandwidth seems benign, but unpleasant surprises await the unwary.

An accurate RMS voltmeter is required for serious AC work. Figure B1 lists types used in our laboratory. These are high grade, specialized instruments specifically intended for precise RMS measurement. All are thermally based¹. The first three entries, general purpose instruments with many ranges and features, are easily used and meet almost all AC measurement needs. The last entry is more of a component than an instrument. The A55 series of “thermal converters” provide millivolt level outputs for various inputs. Typical input ranges are 0.5V_RMS, 1V_RMS, 2V_RMS and 5V_RMS and each converter is supplied with individual calibration data. They are somewhat cumbersome to use and easily destroyed but are highly accurate. Their primary use is as reference standards to check other instrument’s performance.

AC signal handling for high accuracy is a broad topic, involving a considerable degree of depth. This forum must suffer brevity, but some gossip is possible.

Layout is critical. The most prevalent parasitic in AC measurement is stray capacitance. Keep signal path connections short and small area. A few picofarrads of coupling into a high impedance node can upset a 500kHz, 1% accuracy signal path. To the extent possible, keep impedances low to minimize parasitic capacitive effects. Consider individual component parasitics and plan to accommodate them. Examine effects of component placement and orientation on the circuit board. If a ground plane is in use it may be necessary to relieve it in the vicinity of critical circuit nodes or even individual components.

Passive components have parasitics that must be kept in mind. Resistors suffer shunt capacitance whose effects vary with frequency and resistor value. It is worth noting that different brands of resistors, although nominally similar, may exhibit markedly different parasitic behavior. Capacitors in the signal path should be used so that their outer foil is connected to the less sensitive node, affording some relief from pick-up and stray capacitance induced effects. Some capacitors are marked to indicate the outer foil terminal, others require consulting the data sheet or vendor contact. Avoid ceramic capacitors in the signal path. Their piezoelectric responses make them unsuitable for precision AC circuitry. In general, any component in the signal path should be examined in terms of its potential parasitic contribution.

Active components, such as amplifiers, must be treated as potential error sources. In particular, as stated in the text, ensure that there is enough open loop gain at the frequency of interest to assure needed closed loop gain accuracy. Margins of 100:1 are not unreasonable. Keep feedback values as low as possible to minimize parasitic effects.

Route signals to and from the circuit board coaxially and at low impedance, preferably 50Ω, for best results. In 50Ω systems, remember that terminators and attenuators have tolerances that can corrupt a 1% amplitude accuracy measurement. Verify such terminator and attenuator tolerances by measurement and account for them when interpreting measurement results. Similarly, verify the accuracy of any associated instruments 50Ω input or output impedance and account for deviations.

This all seems painful but is an essential part of achieving 1% accurate, 500kHz signal integrity. Failure to observe the precautions listed above risks degrading the RMS-to-DC converters system level performance.

Note

¹ See references 1 and 2 for details on thermally based RMS-to-DC conversion.

Appendix C

Symmetrical White Gaussian Noise

by Ben Hessen-Schmidt, NOISE COM, INC.

White noise provides instantaneous coverage of all frequencies within a band of interest with a very flat output spectrum. This makes it useful both as a broadband stimulus and as a power-level reference.

Symmetrical white Gaussian noise is naturally generated in resistors. The noise in resistors is due to vibrations of the conducting electrons and holes, as described by Johnson and Nyquist.¹ The distribution of the noise voltage is symmetrically Gaussian, and the average noise voltage is:

where:
k = 1.38E–23 J/K (Boltzmann’s constant)
T = temperature of the resistor in Kelvin
f = frequency in Hz
h = 6.62E–34 Js (Planck’s constant)
R(f) = resistance in ohms as a function of frequency

p(f) is close to unity for frequencies below 40GHz when T is equal to 290°K. The resistance is often assumed to be independent of frequency, and Údf is equal to the noise bandwidth (B). The available noise power is obtained when the load is a conjugate match to the resistor, and it is:

where the “4” results from the fact that only half of the noise voltage and hence only 1/4 of the noise power is delivered to a matched load.

Equation 3 shows that the available noise power is proportional to the temperature of the resistor; thus it is often called thermal noise power, Equation 3 also shows that white noise power is proportional to the bandwidth.

An important source of symmetrical white Gaussian noise is the noise diode. A good noise diode generates a high level of symmetrical white Gaussian noise. The level is often specified in terms of excess noise ratio (ENR).

Te is the physical temperature that a load (with the same impedance as the noise diode) must be at to generate the same amount of noise.

The ENR expresses how many times the effective noise power delivered to a non-emitting, nonreflecting load exceeds the noise power available from a load held at the reference temperature of 290°K (16.8°C or 62.3°F).

The importance of high ENR becomes obvious when the noise is amplified, because the noise contributions of the amplifier may be disregarded when the ENR is 17dB larger than the noise figure of the amplifier (the difference in total noise power is then less than 0.1dB). The ENR can easily be converted to noise spectral density in dBm/Hz or μV/√Hz by use of the white noise conversion formulas in Table 1.

When amplifying noise it is important to remember that the noise voltage has a Gaussian distribution. The peak voltages of noise are therefore much larger than the average or RMS voltage. The ratio of peak voltage to RMS voltage is called crest factor, and a good crest factor for Gaussian noise is between 5:1 and 10:1 (14 to 20dB). An amplifier’s 1dB gain-compression point should therefore be typically 20dB larger than the desired average noise-output power to avoid clipping of the noise.

For more information about noise diodes, please contact NOISE COM, INC. at (973) 386-9696.

Additional Reading

1. Johnson, J.B, “Thermal Agitation of Electricity in Conductors,” Physical Review, July 1928, pp. 97-109.
2. Nyquist, H. “Thermal Agitation of Electric Charge in Conductors,” Physical Review, July 1928, pp. 110-113.

Note

¹ See “Additional Reading” at the end of this section.

参考資料

1. Hewlett-Packard Company, “1968 Instrumentation. Electronic—Analytical—Medical,” AC Voltage Measurement, Hewlett-Packard Company, 1968, pp. 197-198.

2. Sheingold, D. H. (editor), “Nonlinear Circuits Handbook,” 2nd Edition, Analog Devices, Inc., 1976.

3. Lambda Electronics, Model LK-343A-FM Manual.

4. Grafham, D. R., “Using Low Current SCRs,” General Electric AN200.19. Jan. 1967.

5. Williams, J., “Performance Enhancement Techniques for Three-Terminal Regulators,” Linear Technology Corp. AN-2. August, 1984. “SCR Preregulator,” pp. 3-6.

6. Williams, J., “High Efficiency Linear Regulators,” Linear Technology Corporation, Application Note 32, “SCR Preregulator.” March 1989, pp. 3-4.

7. Williams, J., “High Speed Amplifier Techniques,” Linear Technology Corporation, Application Note 47, “Parallel Path Amplifiers,” August 1991, pp. 35-37.

8. Williams, J., “Practical Circuitry for Measurement and Control Problems,” Broadband Random Noise Generator,” “Symmetrical White Gaussian Noise,” Appendix B, Linear Technology Corporation, Application Note 61, August 1994, pp.24-26, pp. 38-39.

9. Williams, J., “A Fourth Generation of LCD Backlight Technology,” “RMS Voltmeters,” Linear Technology Corporation, Application Note 65, November 1995, pp. 82-83.

10. Meacham, L. A., “The Bridge Stabilized Oscillator,” Bell System Technical Journal, Vol. 17, p. 574, October 1938.

11. Williams, Jim, “Bridge Circuits—Marrying Gain and Balance,” Linear Technology Corporation, Application Note 43, June, 1990.

著者

Jim Williams

James M. Williams（1948年4月14日～2011年6月12日）はマサチューセッツ工科大学（1968年～1979年）、Philbrick、National Semiconductor（1979年～1982年）、Linear Technology Corporation（LTC）（1982年～2011年）でアナログ回路設計者ならびに技術文書の著者を務めていました。同氏は、書籍5冊、National Semiconductorのアプリケーション・ノート21件、Linear Technologyのアプリケーション・ノート62件、そしてEDNマガジンの記事125件など、アナログ回路設計に関する文書を350件以上執筆していました。同氏は、2011年6月10日に脳卒中を起こし、6月12日に他界しました。