The AD-GMSLCAMRPI-ADP# enables connecting GMSL serializer and deserializer EV kits to a wide range of cameras and processing platforms supporting industry standard ribbon cable connectors. The adapter consists of three sections that can be broken apart from each other, having with the following functionalities:

• Two ribbon cable adapters containing a 15-pin and a 22-pin connector routed to each other. The 15-pin connector supports 2 MIPI lanes, while the 22-pin connector supports 4 MIPI lanes.
• A GMSL serializer EV kit adapter with two 22-pin ribbon cable connectors, for connecting cameras to either of the input MIPI ports of the GMSL serializers
• A GMSL deserializer EV kit adapter with a22-pin ribbon cable connector connected to each of the output MIPI ports, for connecting to Raspberry Pi and Nvidia development platforms, or other processing platform supporting the 15-pin or 22-pin ribbon cable connector. A USB Type-A connector is available to supply 5V @ 4A.

For a detailed look at all GMSL-2 features, including information on how to use the parts, see the newest GMSL-2 User Guide found in Analog Devices’ GMSL customer portal folder. For more information on how to design customized hardware with GMSL2 devices, see the newest GMSL2 Hardware Design Guide in Analog Devices’ GMSL customer portal folder. Finally, in the similar folders, evkit documentation and guides can be found.

APPLICATIONS

• High-Resolution Camera Systems
• Autonomous Guided Vehicles
• Advanced Driver Assistance Systems (ADAS)

The MAX96724 DPHY evaluation kit (EV kit) provides a proven design and reliable platform to evaluate the MAX96724, MAX96724F, and MAX96724R devices using standard FAKRA coaxial cables or a MATE-AX cable. These deserializer devices support high-bandwidth, gigabit multimedia serial links (GMSL-1 or GMSL-2) and offer spread spectrum and full-duplex control channel features. The EV kit includes a simple-to-use Windows 10^® or higher compatible graphical user interface (GUI) to exercise device features. The EV kit comes with a MAX96724, MAX96724F, or MAX96724R IC installed on board.

For complete GMSL-2 evaluation using standard FAKRA coax cables, order the MAX96724 coax EV kit along with a companion serializer board, such as the MAX9295A coax EV kit. For a detailed look at all GMSL-2 features, including information on how to use the parts, see the newest GMSL-2 User Guide found in Analog Devices’ GMSL customer portal folder. For more information on how to design customized hardware with GMSL2 devices, see the newest GMSL2 Hardware Design Guide in Analog Devices’ GMSL customer portal folder.

APPLICATIONS

• High-Resolution Camera Systems
• Advanced Driver Assistance Systems (ADAS)

The AD-GMSL2ETH-SL is an edge compute platform enabling low-latency data transfer from eight Gigabit Multimedia Serial Link™ (GMSL) interfaces on to a 10 Gb Ethernet link. The target applications include autonomous robots and vehicles where machine vision and real-time sensor fusion is critical.

The system includes two MAX96724 Quad Tunneling GMSL2/1 to CSI-2 Deserializers, enabling connectivity to eight GMSL cameras. The video data from the cameras is transferred from the MAX96724 deserializers via MIPI CSI2 interfaces to an AMD KV26 System on Module which implements the logic to aggregate the video data from all the GMSL cameras into a 10 Gb Ethernet link, so that it can be sent to a central processing unit.

The IEEE 1588 Precision Time Protocol (PTP) with hardware timestamping is supported, enabling accurate synchronization with host systems and other edge devices. The AD9545 Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and Jitter Cleaner is used to generate the required clocks for the 10 Gb Ethernet interface and the PTP logic.

A software networking stack can be used to realize the communication over the 10 Gb Ethernet link. Since the system runs Linux tools like gstreamer can be used to send the video data to a host and remote connection into the system is possible via ssh. The software network stack has limitations in terms of the maximum achievable transfer rate, and for this reason there is also the option to have an FPGA accelerated UDP or TCP implementation with Real Time Transfer (RTP) protocol for data packetization, which can get up to the maximum achievable data rate on the 10 Gb ethernet interface.

Accurate camera triggering control is achieved through dedicated FPGA logic, with configurable frequency and phase as well as selecting the trigger source between the internal logic and external signals.

Sixteen (16) general purpose I/O pins are available with software configurable functionality, operating at 3.3 V voltage level. A RS232 dedicated interface can be used to connect UART peripherals such as GNSS devices.

The design is accompanied by an open-source software stack and FPGA design, and reference applications, enabling custom software development to start from a proven implementation.

APPLICATIONS

• Autonomous robots and vehicles