AN-1205: 30 V Low Cost DAC Using the AD5292 Digital Potentiometer

Circuit Function and Benefits

This circuit shown in Figure 1 provides a low cost, high voltage unipolar DAC using the AD5292 digital potentiometer in conjunction with the dual ADA4091-2 op amp and ADR512 voltage reference. This circuit offers 10-bit resolution over an output voltage range of 0 V to 30 V and is capable of delivering up to ±20 mA output current. The AD5292 is programmable over an SPI-compatible serial interface.

The ±1% resistor tolerance of the AD5292 allows it to be placed in series with external divider resistors R₃ and R₄, as shown in Figure 2 and Figure 5, to create a vernier DAC with 10-bit resolution over a reduced V_OUT range. This serves to increase the sensitivity of the DAC, similar to adding resistance in series with a potentiometer. In addition, the AD5292 has an internal 20-times programmable memory that allows a customized V_OUT at power-up.

The circuit provides accurate, low noise, and low tempco output voltage capability and is well suited for digital calibration applications.

Circuit Description

Table 1. Devices Connected/Referenced
Product	Description
AD5292	Digital potentiometer, 10 bits, 1% resistor tolerance
ADR512	Low noise, precision 1.200 V reference
ADA4091-2	Micropower, overvoltage protected (OVP) rail-to-rail op amp

This circuit shown in Figure 1 employs the AD5292 digital potentiometer in conjunction with the ADR512 reference and ADA4091-2 op amp, providing a 10-bit, low cost, high voltage DAC. The circuit guarantees monotonicity, ±1 LSB DNL, and has an integral nonlinearity of ±2 LSB typical.

The high voltage regulator consists of a low voltage reference followed by a noninverting amplifier whose gain is set by the ratio of R₁ to R₂. The ADR512 1.200 V voltage reference has low temperature drift, high accuracy, and ultralow noise performance.

The maximum resistor that ensures an ADR512 minimum operating current is defined in Equation 1.

Equation 1

In Figure 1 and Figure 2 the R_BIAS resistor is 12 kΩ, which sets the bias current of the ADR512 at 2.4 mA.

Figure 1. Unipolar DAC Configuration (Simplified Schematic: Decoupling and All Connections Not Shown).

Figure 2. Increasing the Accuracy by Reducing the Output Voltage Range and Using a Vernier DAC (Simplified Schematic: Decoupling and All Connections Not Shown).

The ADA4091-2 is an op amp that offers a low offset voltage and rail-to-rail output. The ADR512 in combination with the ADA4091 offer a low tempco and noise output voltage.

The resistors R₁ and R₂ adjust the gain in the amplifier. The V₁ output voltage of U1A defines the maximum V_OUT range of the DAC. Equation 2 is used to calculate the resistor values.

Equation 2

In Figure 1 the resistors are chosen to provide a gain of 23.1 and a V₁ value of 27.72 V. This voltage can be used to power other circuits with a maximum output current of 17 mA.

Typical INL and DNL plots are shown in Figure 3 and Figure 4. In the configuration of Figure 1, the AD5292 operates ratiometrically, which means that variation in the total resistor tolerance does not affect the performance.

To improve circuit accuracy, the voltage reference across the AD5292 can be reduced by using two external resistors, as shown in Figure 5, which gives the full 10-bit resolution over a limited voltage range (vernier DAC). Traditionally, digital potentiometers have a ±20% end-to-end resistor tolerance error, which affects the circuit accuracy because of mismatch error between the digital potentiometer and the external resistors. The industry-leading ±1% resistor tolerance performance of the AD5292 helps to overcome the mismatch resistance error.

Figure 5. INL Improvement Using Reduced Reference Voltages to Create a Vernier DAC (Simplified Schematic: Decoupling and All Connections Not Shown).

In this case:

V’₁ = 24.85 V (3)

V’₂ = 23.11 V (4)

1 LSB over the reduced range can be calculated:

Equation 5

Equivalent resolution of the vernier DAC relative to the full reference voltage V₁:

Equation 6

Figure 6 shows the INL (referenced to V₁) using the vernier DAC circuit of Figure 5.

Figure 6. INL of Vernier DAC Referenced to V₁.

The AD5292 has a 20-times programmable memory, which allows presetting the output voltage in a specific value at power-up.

Excellent layout, grounding, and decoupling techniques must be utilized in order to achieve the desired performance from the circuits discussed in this note (see Tutorial MT-031 and Tutorial MT-101). As a minimum, a 4-layer PCB should be used with one ground plane layer, one power plane layer, and two signal layers.

Common Variations

The AD5291 (8-bit with 20-times programmable power-up memory) and AD5293 (10-bit, no power-up memory) are both ±1% tolerance digital potentiometers that are suitable for this application.

The ADR5044 low cost 4.096 V reference is another possibility for the reference. The R₁/R₂ ratio can be adjusted appropriately for the different reference voltage.

Table 2. Typical Specifications for the Unipolar DAC in Figure 1
Parameter	Min	Max	Unit
Power Supply	30	33	V
Output Voltage	0	30	V
Output Current		±20	mA
DNL	–1	+1	LSB
INL	–2	+2	LSB
Settling Time	0.2	2	µs

Learn More

MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND", Analog Devices.

MT-032 Tutorial, Ideal Voltage Feedback (VFB) Op Amp, Analog Devices.

MT-087 Tutorial, Voltage References, Analog Devices.

MT-091 Tutorial, Digital Potentiometers, Analog Devices.

MT-101 Tutorial, Decoupling Techniques, Analog Devices.