Exposed Paddles and Downbonds Improve Performance and Reduce Pin Count


How can a high-performance analog-to-digital converter have numerous power connections but only a couple of grounds?

RAQ:  Issue 112


Lead frame chip scale packages (LFCSP) and quad flat packages (QFP) with exposed die paddles provide an efficient solution for transferring the heat from a component to the printed circuit board (PCB), thereby reducing the thermal impedance. The bottom of the die paddle is exposed, not encapsulated, and should be soldered to the PCB as an integrated heat sink. The recommended PCB design incorporates a land pad for the exposed paddle. The land pad should include an array of vias connected to multiple ground planes within the PCB, thus creating a low-impedance path for the thermal energy.

The exposed paddle provides additional flexibility and advantages by allowing downbonds to be used within the package. These bond wires go from a ground pad on the die directly to the die paddle, as opposed to one of the package pins. Exposed paddles that are connected externally to ground also create a low-impedance electrical path. Experienced designers know that high-performance ICs normally have supply and ground connections on adjacent pins to create a tightly coupled, low-inductance loop for the ground return current. The mutual inductance created by the opposite polarity of the supply and ground currents lowers the impedance. In mixed-signal designs, transient currents on supply and ground connections are created by digital circuit switching, activity on the I/O, and analog signal swings. These transients can degrade the performance of the analog circuits by creating noise on the supply or by coupling onto sensitive nodes within the device. Downbonds are often used to create tightly coupled current loops without using additional package pins. This frees up pins for additional signals, features, and power supply connections.

These internal downbonds are not typically documented for users, leading to some confusion as to how an ADC or DAC could possibly realize high performance without an equal number of supply and ground connections. In some instances, devices may not have any pins connected to ground, thereby relying completely on the external paddle for all ground connections.

RAQ:  Issue 112 LLP Package
LLP package with downbonds. Courtesy of JTL Engineering B.V.1

1LLP Package Drawing


David Buchanan

David Buchanan

David Buchanan received a BSEE from the University of Virginia in 1987. Employed in marketing and applications engineering roles by Analog Devices, Adaptec, and STMicroelectronics, he has experience with a variety of high-performance analog semiconductor products. He is currently a senior applications engineer with ADI’s High Speed Converters product line in Greensboro, North Carolina.