Features and Benefits

  • Low Input Offset Voltage: 500µV Max
  • Low Input Offset Voltage Drift
  • Minimum Slew Rate Guaranteed
  • Temperature-Compensated Input Bias Controls
  • Guaranteed Input Bias Current @ 125°C
  • Bias Current Specified WARM UP Over Temperature
  • Internal Compensation
  • Low Input Noise Current
  • High Common-Mode Rejection Ratio

Product Details

The OP16S device offers clear advantages over industry-generic devices and are superior in performance to many dielectrically-isolated and hybrid op amps. All devices offer offset voltages as low as 0.5mV with TCVOS guaranteed to 10µV/°C. A unique input bias cancellation circuit reduces the IB by a factor of 10 over conventional designs. In addition, ADI specifies IB and IOS with the devices warmed up and operating at 25°C ambient.

The OP16S device was designed to provide real precision performance along with high speed. Although it can be nulled, the design objective was to provide low offset-voltage without nulling. Systems generally become more cost effective as the number of trim circuits is decreased. ADI achieves this performance by use of an improved Bipolar compatible JFET process coupled with on-chip, zener-zap offset triming.

Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

Design Resources

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

PCN-PDN Information

Sample & Buy

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