MAX9325

2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver

Data Sheet (Rev. 3)
Viewing:

Overview

  • 50ps (max) Output-to-Output Skew
  • 1.5psRMS (max) Random Jitter
  • Guaranteed 300mV Differential Output at 700MHz
  • +2.375V to +3.8V Supplies for Differential HSTL/LVPECL
  • -2.375V to -3.8V Supplies for Differential LVECL
  • Two Selectable Differential Inputs
  • On-Chip Reference for Single-Ended Inputs
  • Outputs Low for Inputs Open or at VEE
  • Pin Compatible with MC100LVE310

    • The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew (50ps max) and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a backplane or board. The device selects one of the two differential HSTL or LVECL/LVPECL inputs and repeats them at eight differential outputs. Outputs are compatible with LVECL and LVPECL, and can directly drive 50Ω terminated transmission lines.

    The differential inputs can be configured to accept a single-ended signal when the unused complementary input is connected to the on-chip reference output voltage VBB. All inputs have internal pulldown resistors to VEE. The internal pulldowns and a fail-safe circuit ensure differential low default outputs when the inputs are left open or at VEE.

    The MAX9325 operates over a 2.375V to 3.8V supply range for interfacing to differential HSTL and LVPECL signals. This allows high-performance clock or data distribution in systems with a nominal +2.5V or +3.3V supply. For LVECL operation, the device operates with a -2.375V to -3.8V supply.

    The MAX9325 is offered in 28-lead PLCC and space-saving 28-lead QFN packages. The MAX9325 is specified for operation from -40°C to +85°C.

    Applications

    • Low-Jitter Data Repeater
    • Precision Clock Distribution
    MAX9325
    2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9325: Functional Diagram
    Add to myAnalog

    Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

    Create New Project
    Ask a Question

    Documentation

    Data Sheet 1

    Technical Articles 1

    Learn More
    Add to myAnalog

    Add media to the Resources section of myAnalog, to an existing project or to a new project.

    Create New Project

    Hardware Ecosystem

    Parts Product Life Cycle Description
    Fanout Buffers & Splitters 8
    MAX9311
    		PRODUCTION 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
    MAX9312
    		PRODUCTION Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
    MAX9313
    		1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
    MAX9314
    		Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
    MAX9310
    		PRODUCTION 1:5 Clock Driver with Selectable LVPECL Inputs and LVDS Outputs
    MAX9317
    		Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
    MAX9326
    		1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9322
    		LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver
    Modal heading
    Add to myAnalog

    Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

    Create New Project

    Latest Discussions

    No discussions on MAX9325 yet. Have something to say?

    Start a Discussion on EngineerZone®

    Recently Viewed