MAX9322

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

1:15 Divide-by-1, Divide-by-2 Differential LVPECL Clock Driver

Data Sheet (Rev. 2)
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Overview

  • 1.2ps (RMS) Maximum Random Jitter
  • 300mV Differential Output at 1.0GHz
  • 900ps Propagation Delay
  • Selectable Divide-by-1 or Divide-by-2 Frequency Outputs
  • Multiplexed 2:1 Input Function
  • LVECL Operation from VEE = -2.375V to -3.8V
  • LVPECL Operation from VCC = +2.375V to +3.8V
  • ESD Protection: > 2kV Human Body Model

The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from one of two input clocks with input switching frequency in excess of 1.0GHz. The 15 outputs are arranged in four banks with 2, 3, 4, and 6 outputs, respectively. Each output bank is individually programmable to provide a divide-by-1 or divide-by-2 frequency function.

The MAX9322 operates in LVPECL systems with a +2.375V to +3.8V supply or in LVECL systems with a -2.375V to -3.8V supply. A VBB reference output provides compatibility with single-ended clock input signals and a master reset input provides a simultaneous reset on all outputs.

The MAX9322 is available in 52-pin TQFP and 68-pin QFN packages and is specified for operation over -40°C to +85°C. For 1:10 clock drivers, refer to the MAX9311/MAX9313 data sheet. For 1:5 clock drivers, refer to the MAX9316 data sheet.

Applications

  • Automated Test Equipment (ATE)
  • Central Office Backplane Clock Distribution
  • DSLAM Backplane
  • Low-Jitter Data Repeater
  • Precision Clock Distribution
  • Wireless Base Stations
MAX9322
LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver
MAX9322: Typical Operating Circuit
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Documentation

Data Sheet 1

Technical Articles 2

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Hardware Ecosystem

Parts Product Life Cycle Description
Fanout Buffers & Splitters 7
MAX9312
PRODUCTION Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9314
Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9311
PRODUCTION 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
MAX9315
PRODUCTION 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9316
1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver
MAX9326
1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver
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Tools & Simulations

IBIS Model 1

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