MAX9316

1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver

Data Sheet (Rev. 0)

Viewing:

Overview

Guaranteed 400mV Differential Output at 1.5GHz

Selectable Single-Ended or Differential Input

130ps (max) Part-to-Part Skew at +25°C

20ps Output-to-Output Skew

365ps Propagation Delay

Synchronous Output Enable/Disable

On-Chip Reference for Single-Ended Inputs

Input Biased to Low when Open

Pin Compatible with MC100LVEL14

The MAX9316 is a low-skew, 1-to-5 differential driver designed for clock and data distribution. This device allows selection between two inputs: one differential and one single ended. The selected input is reproduced at five differential outputs. The differential input can be adapted to accept a single-ended input by connecting the on-chip V_BB supply to one input as a reference voltage.

The MAX9316 features low output-to-output skew (20ps), making it ideal for clock and data distribution across a backplane or board. For interfacing to differential HSTL and LVPECL signals, this device operates over a +3.0V to +3.8V supply range, allowing high-performance clock or data distribution in systems with a nominal +3.3V supply. For differential LVECL operation, this device operates with a -3.0V to -3.8V supply.

The MAX9316 is offered in a space-saving 20-pin TSSOP and wide-body SO package.

Applications