LT3074

RECOMMENDED FOR NEW DESIGNS

5.5V, 3A Ultralow Noise, High PSRR, 45mV Dropout Linear Regulator with PMBus

Viewing:

Overview

  • Ultralow RMS Noise: 1.2μVRMS (10Hz to 100kHz)
  • Ultralow Spot Noise: 3.5nV/√Hz at 10kHz
  • Ultralow 1/f Noise: 7μVP-P (0.1Hz to 10Hz)
  • High PSRR at High Frequency: 52dB at 1MHz
  • Ultrafast Transient Response
  • Dropout Voltage: 45mV Typical
  • 100μA Reference Current: ±0.5% Initial Accuracy
  • Precision Current Monitor: ±3% Accuracy at 3A
  • PMBus Capability Includes:
    • VOUT, IOUT, VIN, VBIAS, and Temperature Reporting
    • VOUT Margining
    • IOUT Overcurrent and Undercurrent Warn Limits
    • VOUT, VIN, and VBIAS Undervoltage and Overvoltage Warn Limits
    • Overtemperature Warn Limit
  • Stable with Ceramic Output Capacitors (10μF Minimum)
  • Parallel Multiple Devices for Higher Current
  • VIOC Pin to Control Upstream Switching Converter
  • 22-Lead (3mm × 4mm) LQFN Package

The LT3074 is a low voltage, ultralow noise, and ultrafast transient response linear regulator with a PMBus serial interface. The device supplies up to 3A with a typical dropout voltage of 45mV. A 4.7μF reference bypass capacitor decreases output voltage noise to 1.2μVRMS. The wide bandwidth and high PSRR permit the use of small ceramic capacitors, saving bulk capacitance and cost. The LT3074 is supported by the LTPowerPlay software development tool with a graphical user interface (GUI).

The LT3074 sources a 100μA precision reference current to the LT3074’s SETRES pin. Placing a resistor from this SETRES pin to GND sets the output voltage. The LT3074’s unity-gain operation provides virtually constant output noise, PSRR, bandwidth and load regulation, independent of the programmed output voltage. Additionally, the LT3074 incorporates a unique tracking feature (VIOC) to control the upstream switching regulator to maintain a constant voltage across the LT3074, and hence minimize power dissipation.

The PMBus control allows to set the output current limit from 1A to 6.4A in discrete steps of 0.05A. The PMBus Telemetry feature provides information regarding the output voltage and current, input voltage, bias voltage and die temperature. The LT3074 features a CLKDIS pin to control the internal clock. Pulling this pin to BIAS disables the internal clocks to put LT3074 in the “quiet mode”. The LT3074 is available in a compact 22 lead (3mm × 4mm) LQFN package (laminate package with QFN footprint).

APPLICATIONS

  • RF Power Supplies: PLLs, VCOs, Mixers, LNAs, PAs 
  • High Speed/High Precision Data Converters
  • Low Noise Instrumentation
  • Post-Regulator for Switching Supplies
  • FPGA and DSP Power Supplies
  • Medical Applications

LT3074
5.5V, 3A Ultralow Noise, High PSRR, 45mV Dropout Linear Regulator with PMBus
LT3074 fbl LT3074 Pin Configuration LT3074 Chip
Add to myAnalog

Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

Create New Project
Ask a Question

Documentation

Learn More
Add to myAnalog

Add media to the Resources section of myAnalog, to an existing project or to a new project.

Create New Project

Software Resources

Can't find the software or driver you need?

Request a Driver/Software

Tools & Simulations

LTpowerPlay®

LTpowerPlay® is a powerful, Windows-based development environment supporting Linear Technology's Digital Power System Management (PSM) products.

Open Tool

Evaluation Kits

eval board
EVAL-LT3074

Evaluating the LT3074 3A, Ultralow Noise, High PSRR, 45mV Dropout Ultrafast Linear Regulator with PMBus

Features and Benefits

  • Input voltage range: 0.6V to 5.5V
  • BIAS voltage range: 2.375V to 5.5V
  • Maximum output current: 3A
  • I2C/PMBus communication
  • Jumper selects bias mode of either external bias voltage or 3.3V internal logic power from the PMBus interface
  • Output voltage is precisely programmed to 1.20V by two 1%m resistors in series
  • BNC connectors for noise and PSRR measurement
  • Component placeholder can connect the PGFB pin directly to BIASAF to keep PG high
  • Operates standalone without PMBus programming
  • Jumper turns regulator on or off
  • Jumper enables or disables the internal clocks of LT3074 for noise performance verification
  • Jumper and resistor combinations select the serial bus interface address
  • Stacking connectors allow PMBus communication to multiple EVAL-LT3074-AZ
  • 6-pin 0.1 inch pitch connector implements Pmod Type 6 I2C
  • LED indication of POWER ON, POWER GOOD and PMBus ALERT
  • Terminals provide output current and output regulation status monitoring
  • The VIOC pin of the LT3074 manages power dissipation and PSRR
  • Banana jacks minimize VIN and VOUT connection voltage drops
  • VO+, VO−, and VI+ terminals for regulation and dropout monitoring
  • Component footprint for an SMA connector that allows a shielded VIN power connection
  • 22-lead (3mm x 4mm) LQFN package

Product Details

The EVAL-LT3074-AZ evaluation board features the LT3074, a 3A, ultralow noise, high power-supply rejection ratio (PSRR), 45mV dropout ultrafast linear regulator with PMBus capability. The input voltage (VIN) range for the VIN power is from 0.6V to 5.5V. The maximum output current is 3A. The output voltage is precisely programmed to 1.20V by two 1% resistors in series. The EVAL-LT3074-AZ requires a BIAS voltage (VBIAS) that is at least 1.2V higher than VOUT and is between 2.375V and 5.5V. There is a jumper (JP4), which gives an option to connect the BIAS pin to either an external bias voltage or the internal 3.3V logic power from the PMBus interface (discussed later in this section). The EVAL-LT3074-AZ can operate standalone without PMBus programming.

The LT3074 of the EVAL-LT3074-AZ requires few external components. Therefore, it simplifies circuit design. The external component choice and careful printed circuit board (PCB) design help optimize noise, PSRR, load transient response, and VOUT regulation performance. The LT3074 requires capacitors for the internal reference, power input, BIASAF pin, BIASDF pin, and the power output. The internal reference is bypassed with a 16V, 0805-sized, 4.7μF capacitor, which is placed at the SETCAP pin, to reduce output noise and program the soft-start. Larger capacitor case sizes and higher voltage ratings decrease 1/f noise for otherwise comparable capacitors. The 22μF capacitor at the circuit output is chosen for high-frequency PSRR performance and to minimize VOUT deviation during load transients.

Please see the User Guide for the full description.

EVAL-LT3074
Evaluating the LT3074 3A, Ultralow Noise, High PSRR, 45mV Dropout Ultrafast Linear Regulator with PMBus
EVAL-LT3074 Board Photo Angle View EVAL-LT3074 Board Photo Top View EVAL-LT3074 Board Photo Bottom View

Latest Discussions

No discussions on LT3074 yet. Have something to say?

Start a Discussion on EngineerZone®

Recently Viewed