LT1457

PRODUCTION

Dual, Precision JFET Input Op Amp

Part Models: 4
1ku List Price: Starting From $3.01

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Overview

Handles 10,000pF Capacitive Load
450µV Max Offset Voltage
1200µV Max Offset Voltage in S8 Package
50pA Bias Current at 70°C
13nV/√Hz Voltage Noise
4V/µs Slew Rate
4µV/°C Drift
130dB Channel Separation

The LT1457 is a dual, JFET input op amp optimized for handling large capacitive loads in combination with precision performance.

Precision specifications include 220µV offset voltage in plastic and surface mount packages. At 70°C input bias current is 50pA, input offset current is 20pA. Channel separation is 130dB.

Other dual JFET input op amps from ADI include the LT1057, which is three times faster than the LT1457 but at the expense of significantly lower capacitive load handling capability; and the LT1113 with 4.5nV/rt Hz voltage noise.

Applications

Sample-and-Hold (Drives Large Hold Capacitors)
A/D and D/A Converters
Photodiode Amplifiers
Voltage-to-Frequency Converters

Part Models: 4
1ku List Price: Starting From $3.01

Documentation

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
LT1457ACN8#PBF	8-Lead PDIP (Narrow 0.3 Inch)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
LT1457CN8#PBF	8-Lead PDIP (Narrow 0.3 Inch)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
LT1457S8#PBF	8-Lead SOIC (Narrow 0.15 Inch)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
LT1457S8#TRPBF	8-Lead SOIC (Narrow 0.15 Inch)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Oct 8, 2024 - 24_0234 Migrating Bottom Trace Code Marking to Top Side Laser Marking for PDIP Package
		PCN24_0234_Form Material_Report Marking Comparison
LT1457ACN8#PBF	PRODUCTION
LT1457CN8#PBF	PRODUCTION
Oct 11, 2022 - 22_0241 Epoxy Change from Henkel 8290 to 8290A for PDIP Package
		PCN22_0241_Form Material_Report Qualification Results Summary
LT1457ACN8#PBF	PRODUCTION
LT1457CN8#PBF	PRODUCTION
Aug 6, 2022 - 22_0172 Laser Top Mark Conversion for PDIP Packages Assembled in ADPG [PNG]
		PCN22_0172_Form Material_Report Delta Qualification Matrix
LT1457ACN8#PBF	PRODUCTION
LT1457CN8#PBF	PRODUCTION
Oct 8, 2024 - 24_0236 Migrating Bottom Trace Code Marking to Top Side Laser Marking for SOIC_N Package
		PCN24_0236_Form Material_Report Marking Comparison Delta Qualification Matrix
LT1457S8#PBF	PRODUCTION
LT1457S8#TRPBF	PRODUCTION
Oct 12, 2022 - 22_0254 Epoxy Change from Henkel 8290 to 8290A for 8-Lead SOIC Package (PCN part 1 of 2)
		PCN22_0254_Form Material_Report Qualification Results Summary Delta Qualification Matrix
LT1457S8#PBF	PRODUCTION
LT1457S8#TRPBF	PRODUCTION
Jun 11, 2021 - 21_0060 Laser Top Mark for 8SOICN Assembled in ADPG, UTL and CRM
		PCN21_0060_Form Material_Report Delta Qualification Matrix
LT1457S8#PBF	PRODUCTION
LT1457S8#TRPBF	PRODUCTION

This is the most up-to-date revision of the Data Sheet.

Software Resources

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Tools & Simulations

LTspice

Models for the following parts are available in LTspice:

LT1457

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

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Overview

Documentation

Data Sheet 1

Reliability Data 1

Design Note 4