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HMC8402-DIE

RECOMMENDED FOR NEW DESIGNS

2 GHz to 30 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier

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Overview

  • Output power for 1 dB compression (P1dB): 21.5 dBm typical
  • Saturated output power (PSAT): 22 dBm typical
  • Gain: 13.5 dB typical
  • Noise figure: 2 dB
  • Output third order intercept (IP3): 26 dBm typical
  • Supply voltage: 7 V at 68 mA
  • 50 Ω matched input/output
  • Die size: 2.7 mm × 1.363 mm × 0.05 mm

The HMC8402 is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), low noise amplifier which operates between 2 GHz and 30 GHz. The amplifier provides 13.5 dB of gain, 2 dB noise figure, 26 dBm output IP3, and 21.5 dBm of output power at 1 dB gain compression while requiring 68 mA from a 7 V supply. The HMC8402 is self biased with only a single positive supply needed to achieve a drain current IDQ of 68 mA.

The HMC8402 amplifier input/outputs are internally matched to 50 Ω facilitating integration into multichip modules (MCMs). All data is taken with the chip connected via two 0.025 mm (1 mil) wire bonds of minimal length 0.31 mm (12 mils).

APPLICATIONS

  • Test instrumentation
  • Microwave radios and very small aperture terminals (VSATs)
  • Military and space
  • Telecommunications infrastructure
  • Fiber optics

HMC8402-DIE

2 GHz to 30 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier

HMC8402 Functional Block Diagram HMC8402 Pin Configuration HMC8402 Circuit Diagram
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Tools & Simulations

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

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Sys-Parameter Models for Keysight Genesys

Sys-Parameter models contain behavioral parameters, such as P1dB, IP3, gain, noise figure and return loss, which describe nonlinear and linear characteristics of a device.

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S-Parameter 1

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