HMC830

LAST TIME BUY

Fractional-N PLL with Integrated VCO SMT, 25 - 3000 MHz

Data Sheet Product Selection Table
Part Models
2
1ku List Price
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Part Details

  • RF Bandwidth: 25 - 3000 MHz
  • Maximum Phase Detector Rate 100 MHz
  • Ultra Low Phase Noise -110 dBc/Hz in Band Typ.
  • Figure of Merit (FOM) -230 dBc/Hz Integer
  • 40 Lead 6 x 6 mm SMT Package: 36 mm²
HMC830
Fractional-N PLL with Integrated VCO SMT, 25 - 3000 MHz
HMC830 Functional Block Diagram
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Documentation

Data Sheet 1

User Guide 1

Application Note 4

Technical Articles 2

Data Sheet

This is the most up-to-date revision of the Data Sheet.

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Software Resources

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Hardware Ecosystem

Parts Product Life Cycle Description
Clock Distribution Devices 1
HMC1031
LAST TIME BUY 0.1 MHz to 500 MHz Clock Generator with Integer N PLL
High Speed Comparators (<100ns Propagation Delay) 1
LTC6957
Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
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Tools & Simulations

ADIsimFrequency Planner Tool

For those developers dealing with integer boundary spurs from Analog’s PLL synthesizers, the best solution is ADIsimFrequencyPlanner. The frequency planner quickly analyzes the PFD frequency for a user’s output requirements and then optimizes the frequency of each output to identify the highest contributing integer boundary spur performance.

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ADIsimPLL™

ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.

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IBIS Model 1

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