Features and Benefits
- Low Noise Floor:
-163 dBc/Hz at 10 MHz
-160 dBc/Hz at 100 kHz offset
- Programmable Frequency Divider, N = 1, 2, 3 or 4
- 200 MHz to 2 GHz Input Frequency Range
- 50% Duty Cycle Outputs
- Up to +10 dBm Output Power
- Sleep Mode: Consumes <1 μA
- 16 Lead 3x3mm SMT Package: 9mm²
The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 200 MHz to 2 GHz input frequency range. The high level output power (up to 10 dBm) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation and LO drive applications. Configurable bias controls allow power minimization of up to 20%.
- LO Generation with Low Noise Floor
- Clock Generators
- Mixer LO Drive
- Military Applications
- Test Equipment
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Product Selection Guide (1)
Quality Documentation (4)
Tape & Reel Specification (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.