DS2152

Enhanced T1 Single Chip Transceiver

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Overview

  • Complete DS1/ISDN-PR1 transceiver
  • Short- and long-haul trunk capability
  • Independent send and receive functions
  • 32-bit or 128-bit jitter attenuator
  • DSX-1 and CXU line build-outs
  • D4, ESF, and SLC-96R framing
  • Integrated HDLC controller with 16-byte buffers for the FDL
  • Dual onboard elastic buffers connect to backplanes up to 8.192MHz
  • Programmable output clocks for Fractional T1
  • 8-bit parallel control port can be muxed or nonmuxed
  • Extracts/inserts robbed-bit signals
  • Detects/generates yellow and blue alarms
  • Onboard FDL support circuitry
  • Generates/detects in-band loop codes
  • Generates/detects CSU loop codes
  • ANSI one's density monitor/enforcer
  • Path and line error counters, including BPV, CV, CRC6 and framing bit errors
  • Pin-compatible with DS2154
  • Operating ranges:
    • 5.0V
    • 0°C to +70°C (DS2152L)
    • -40°C to +85°C (DS2152LN)

The DS2152 is a second-generation line interface unit for T1 lines. It is pin- and software-compatible with the first-generation DS2151Q and function- and pin-compatible with the DS2154, its E1 counterpart. The DS2152 retains all features of the DS2151Q, adding crystalless jitter attenuation, additional hardware signaling, a full HDLC controller for the FDL layer with 16-byte buffers, and the option for nonmultiplexed bus operation.

The DS2152 meets T1 specifications, including ANSI T1 403-1995, ANSI T1.231-1993, AT&T TR 6241 (12-90), AT&T TR54016, and ITU G.703, G.704 G.706, G.823, and 1.431, that network to central office interfaces. Via the parallel port, the user can quickly access the internal 8-bit internal registers to configure the DS2152 to the application under processor control.

DS2152
Enhanced T1 Single Chip Transceiver
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Documentation

Data Sheet 1

Reliability Data 1

Application Note 4

Design Note 20

Technical Articles 3

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